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/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dmemset.ll38 ; YMM-LABEL: t:
40 ; YMM-NEXT: pushl %ebp
41 ; YMM-NEXT: movl %esp, %ebp
43 ; YMM-NEXT: subl $96, %esp
48 ; YMM-NEXT: vzeroupper
49 ; YMM-NEXT: calll _foo
51 ; YMM-NEXT: popl %ebp
52 ; YMM-NEXT: retl
89 ; YMM-LABEL: PR15348:
90 ; YMM: ## %bb.0:
[all …]
H A Davx512f-256-set0.mir4 # Test that we emit VPXORD with ZMM registers instead of YMM
H A Dsha.ll188 ; Make sure we don't forget that sha instructions have no VEX equivalents and thus don't zero YMM/Z…
H A Dnontemporal-2.ll237 ; And now YMM versions.
748 ; And now YMM versions.
1024 ; And now YMM versions.
/llvm-project-15.0.7/lldb/source/Plugins/ABI/X86/
H A DABIX86.cpp164 #define YMM(n) \ macro
181 YMM(0), YMM(1), YMM(2), YMM(3), YMM(4), YMM(5), YMM(6), YMM(7)}}; in makeBaseRegMap()
189 YMM(8), YMM(9), YMM(10), YMM(11), YMM(12), in makeBaseRegMap()
190 YMM(13), YMM(14), YMM(15)}}; in makeBaseRegMap()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86Schedule.td85 X86FoldableSchedWrite YMM = s256; // YMM operations.
121 X86SchedWriteMoveLS YMM = s256; // YMM operations.
297 defm WriteFMAY : X86SchedWritePair<ReadAfterVecYLd>; // Fused Multiply Add (YMM).
386 defm WritePMULLDY : X86SchedWritePair<ReadAfterVecYLd>; // Vector PMULLD (YMM).
390 defm WriteShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Vector shuffles (YMM).
397 defm WriteBlendY : X86SchedWritePair<ReadAfterVecYLd>; // Vector blends (YMM).
404 defm WritePSADBWY : X86SchedWritePair<ReadAfterVecYLd>; // Vector PSADBW (YMM).
407 defm WriteMPSADY : X86SchedWritePair<ReadAfterVecYLd>; // Vector MPSAD (YMM).
430 defm WriteCvtPS2IY : X86SchedWritePair<ReadAfterVecYLd>; // Float -> Integer (YMM).
440 defm WriteCvtI2PSY : X86SchedWritePair<ReadAfterVecYLd>; // Integer -> Float (YMM).
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H A DX86ScheduleZnver3.td910 defm : X86WriteResPairUnsupported<WriteFMulZ>; // Floating point multiplication (YMM).
942 defm : Zn3WriteResYMMPair<WriteFMAY, [Zn3FPFMul01], 4, [2], 1>; // Fused Multiply Add (YMM).
1117 defm : Zn3WriteResYMMPair<WritePMULLDY, [Zn3FPVMul01], 3, [1], 1>; // Vector PMULLD (YMM).
1121 defm : Zn3WriteResYMMPair<WriteShuffleY, [Zn3FPVShuf01], 1, [1], 1>; // Vector shuffles (YMM).
1128 defm : Zn3WriteResYMMPair<WriteBlendY, [Zn3FPVMisc0123], 1, [1], 1>; // Vector blends (YMM).
1135 defm : Zn3WriteResYMMPair<WritePSADBWY, [Zn3FPVAdd0123], 3, [2], 1>; // Vector PSADBW (YMM).
1169 defm : Zn3WriteResYMMPair<WriteCvtPS2IY, [Zn3FPFCvt01], 3, [1], 1>; // Float -> Integer (YMM).
1186 defm : Zn3WriteResYMMPair<WriteCvtI2PSY, [Zn3FPFCvt01], 3, [1], 1>; // Integer -> Float (YMM).
1484 // AVX YMM variants.
1599 // AVX YMM Zero-idioms.
[all …]
H A DX86SchedBroadwell.td263 defm : BWWriteResPair<WriteFAddY, [BWPort1], 3, [1], 1, 6>; // Floating point add/sub (YMM/ZMM).
272 defm : BWWriteResPair<WriteFCmpY, [BWPort1], 3, [1], 1, 6>; // Floating point compare (YMM/ZMM).
324 defm : BWWriteResPair<WriteFMAY, [BWPort01], 5, [1], 1, 6>; // Fused Multiply Add (YMM/ZMM).
332 defm : X86WriteRes<WriteFRndY, [BWPort23], 6, [1], 1>; // Floating point rounding (YMM…
428 defm : BWWriteResPair<WriteVecLogicY,[BWPort015], 1, [1], 1, 6>; // Vector integer and/or/xor (YMM/…
442 defm : BWWriteResPair<WritePMULLDY, [BWPort0], 10, [2], 2, 6>; // Vector PMULLD (YMM/ZMM).
446 defm : BWWriteResPair<WriteShuffleY, [BWPort5], 1, [1], 1, 6>; // Vector shuffles (YMM/ZMM).
450 defm : BWWriteResPair<WriteVarShuffleY,[BWPort5], 1, [1], 1, 6>; // Vector variable shuffles (YMM/Z…
453 defm : BWWriteResPair<WriteBlendY, [BWPort5], 1, [1], 1, 6>; // Vector blends (YMM/ZMM).
459 defm : BWWriteResPair<WriteVarBlendY, [BWPort5], 2, [2], 2, 6>; // Vector variable blends (YMM/ZMM).
[all …]
H A DX86InstrFMA.td113 VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>,
116 VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>,
119 VR256, OpTy256, f256mem, MemFrag256, Op, sched.YMM>,
504 VEX_W, VEX_L, Sched<[sched.YMM]>;
511 Sched<[sched.YMM.Folded, sched.YMM.ReadAfterFold, sched.YMM.ReadAfterFold]>;
518 Sched<[sched.YMM.Folded, sched.YMM.ReadAfterFold,
523 sched.YMM.ReadAfterFold]>;
535 VEX_L, Sched<[sched.YMM]>, FoldGenData<NAME#Yrr>;
H A DX86CallingConv.td42 list<Register> YMM = [];
54 let YMM = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7];
61 let YMM = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7,
120 // __m256, __m256i, __m256d --> YMM
123 CCIfSubtarget<"hasAVX()", CCAssignToReg<RC.YMM>>>,
197 // __m256, __m256i, __m256d --> YMM
199 CCIfSubtarget<"hasAVX()", CCAssignToReg<RC.YMM>>>,
807 // AVX 256-bit vector arguments are passed in YMM registers.
827 // AVX 256-bit vector arguments are passed in YMM registers.
1051 // The 256-bit vector arguments are passed in YMM registers.
[all …]
H A DX86InstrSSE.td418 let SchedRW = [SchedWriteFMoveLS.YMM.MR] in {
1565 // YMM only
1649 // YMM only
3600 OpNode, OpNode2, VR256, sched.YMM, schedImm.YMM,
4476 Sched<[sched.YMM]>;
4688 Sched<[sched.YMM]>;
5693 Sched<[SchedWriteVecTest.YMM.Folded, SchedWriteVecTest.YMM.ReadAfterFold]>,
7170 // with YMM register containing zero.
7415 // VZERO - Zero YMM registers
7422 // Zero All YMM registers
[all …]
H A DX86InstrXOP.td82 SchedWriteFRnd.YMM>;
91 SchedWriteFRnd.YMM>;
371 SchedWriteShuffle.YMM>, VEX_L;
462 SchedWriteFVarShuffle.YMM>, VEX_L;
471 SchedWriteFVarShuffle.YMM>, VEX_L;
H A DX86InstrAVX512.td2231 defm Z256 : avx512_icmp_packed<opc, OpcodeStr, sched.YMM,
3582 masked_store, Sched.YMM,
3601 masked_store_aligned, Sched.YMM,
6085 defm WZ256: avx512_vptest<opc, OpcodeStr#"w", sched.YMM,
6089 defm BZ256: avx512_vptest<opc, OpcodeStr#"b", sched.YMM,
6200 sched.YMM, VTInfo.info256>,
6817 sched.YMM, _.info256>,
6912 sched.YMM, _.info256>,
7008 sched.YMM, _.info256>,
9502 sched.YMM>,
[all …]
H A DX86RegisterInfo.td255 def YMM#Index : X86Reg<"ymm"#Index, Index, [!cast<X86Reg>("XMM"#Index)]>,
263 def ZMM#Index : X86Reg<"zmm"#Index, Index, [!cast<X86Reg>("YMM"#Index)]>,
575 256, (sequence "YMM%u", 0, 15)>;
610 256, (sequence "YMM%u", 0, 31)>;
H A DX86ScheduleZnver1.td1125 //=== Floating Point XMM and YMM Instructions ===//
1565 // AVX YMM Zero-idioms.
1597 // AVX YMM
H A DX86ScheduleZnver2.td1141 //=== Floating Point XMM and YMM Instructions ===//
1576 // AVX YMM Zero-idioms.
1608 // AVX YMM
/llvm-project-15.0.7/lldb/source/Plugins/Process/Utility/
H A DRegisterContext_x86.h303 struct YMM { struct
326 YMM = SSE << 1, enumerator
327 BNDREGS = YMM << 1,
H A DRegisterContextPOSIX_x86.h184 lldb_private::YMM m_ymm_set; // copy of ymmh and xmm register halves.
H A DRegisterContextPOSIX_x86.cpp447 ::memset(&m_ymm_set, 0, sizeof(YMM)); in RegisterContextPOSIX_x86()
/llvm-project-15.0.7/lldb/source/Plugins/Process/Linux/
H A DNativeRegisterContextLinux_x86_64.h102 YMM m_ymm_set;
H A DNativeRegisterContextLinux_x86_64.cpp570 xstate_bv |= XSAVE_HDR::XFeature::YMM | XSAVE_HDR::XFeature::SSE; in UpdateXSTATEforWrite()
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BtVer2/
H A Dpipes-fpu.s16 # FPA/FPM YMM
H A Dzero-idioms-avx-256.s4 # TODO: Fix the processor resource usage for zero-idiom YMM XOR instructions.
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BdVer2/
H A Dpipes-fpu.s16 # FPA/FPM YMM
H A Dzero-idioms-avx-256.s4 # TODO: Fix the processor resource usage for zero-idiom YMM XOR instructions.

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