| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreRegisterInfo.cpp | 69 case XCore::LDWFI: in InsertFPImmInst()
75 case XCore::STWFI: in InsertFPImmInst()
105 case XCore::LDWFI: in InsertFPConstInst()
139 NewOpcode = (isU6) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in InsertSPImmInst()
145 NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6; in InsertSPImmInst()
152 NewOpcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in InsertSPImmInst()
214 XCore::R4, XCore::R5, XCore::R6, XCore::R7, in getCalleeSavedRegs()
215 XCore::R8, XCore::R9, XCore::R10, in getCalleeSavedRegs()
219 XCore::R4, XCore::R5, XCore::R6, XCore::R7, in getCalleeSavedRegs()
220 XCore::R8, XCore::R9, in getCalleeSavedRegs()
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| H A D | XCoreInstrInfo.cpp | 34 namespace XCore { namespace
49 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP), in XCoreInstrInfo()
65 if (Opcode == XCore::LDWFI) in isLoadFromStackSlot()
85 if (Opcode == XCore::STWFI) in isStoreToStackSlot()
136 return XCore::COND_TRUE; in GetCondFromBranchOpc()
150 case XCore::COND_TRUE : return XCore::BRFT_lru6; in GetCondBranchFromCond()
151 case XCore::COND_FALSE : return XCore::BRFF_lru6; in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
161 case XCore::COND_TRUE : return XCore::COND_FALSE; in GetOppositeBranchCondition()
162 case XCore::COND_FALSE : return XCore::COND_TRUE; in GetOppositeBranchCondition()
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| H A D | XCoreFrameLowering.cpp | 106 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in IfNeededExtSP()
128 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in IfNeededLDAWSP()
201 int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in RestoreSpillList()
242 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDWSP_ru6), XCore::R11).addImm(0); in emitPrologue()
262 int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; in emitPrologue()
287 int Opcode = isImmU6(Offset) ? XCore::STWSP_ru6 : XCore::STWSP_lru6; in emitPrologue()
400 int Opcode = isImmU6(RemainingAdj) ? XCore::RETSP_u6 : XCore::RETSP_lu6; in emitEpilogue()
432 assert(Reg != XCore::LR && !(Reg == XCore::R10 && hasFP(*MF)) && in spillCalleeSavedRegisters()
459 assert(Reg != XCore::LR && !(Reg == XCore::R10 && hasFP(*MF)) && in restoreCalleeSavedRegisters()
510 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in eliminateCallFramePseudoInstr()
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| H A D | XCoreISelDAGToDAG.cpp | 120 Reg = CurDAG->getRegister(XCore::CP, MVT::i32); in SelectInlineAsmMemoryOperand()
123 Reg = CurDAG->getRegister(XCore::DP, MVT::i32); in SelectInlineAsmMemoryOperand()
142 ReplaceNode(N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl, in Select()
165 ReplaceNode(N, CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, in Select()
172 ReplaceNode(N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, in Select()
179 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, in Select()
186 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32, in Select()
193 ReplaceNode(N, CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, in Select()
199 ReplaceNode(N, CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, in Select()
275 CurDAG->SelectNodeTo(N, XCore::BRFU_lu6, MVT::Other, in tryBRIND()
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| H A D | XCore.td | 1 //===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===//
9 // This is the top level entry point for the XCore target.
30 // XCore processors supported.
43 def XCore : Target {
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| H A D | XCoreRegisterInfo.td | 1 //===-- XCoreRegisterInfo.td - XCore Register defs ---------*- tablegen -*-===//
10 // Declarations that describe the XCore register file
15 let Namespace = "XCore";
44 def GRRegs : RegisterClass<"XCore", [i32], 32,
53 def RRegs : RegisterClass<"XCore", [i32], 32,
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| H A D | XCoreCallingConv.td | 1 //===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
8 // This describes the calling conventions for XCore architecture.
12 // XCore Return Value Calling Convention
24 // XCore Argument Calling Conventions
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| H A D | CMakeLists.txt | 1 add_llvm_component_group(XCore)
3 set(LLVM_TARGET_DEFINITIONS XCore.td)
45 XCore
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| H A D | XCoreMachineFunctionInfo.cpp | 45 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createLRSpillSlot()
63 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createFPSpillSlot()
76 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createEHSpillSlot()
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| H A D | XCoreAsmPrinter.cpp | 266 case XCore::DBG_VALUE: in emitInstruction()
268 case XCore::ADD_2rus: in emitInstruction()
277 case XCore::BR_JT: in emitInstruction()
278 case XCore::BR_JT32: in emitInstruction()
281 if (MI->getOpcode() == XCore::BR_JT) in emitInstruction()
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| H A D | XCoreFrameToArgsOffsetElim.cpp | 54 if (MBBI->getOpcode() == XCore::FRAME_TO_ARGS_OFFSET) { in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 262 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
265 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
268 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
271 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
274 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
277 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
280 Inst.setOpcode(XCore::OR_3r); in Decode2OpInstructionFail()
283 Inst.setOpcode(XCore::LDW_3r); in Decode2OpInstructionFail()
289 Inst.setOpcode(XCore::LD8U_3r); in Decode2OpInstructionFail()
310 Inst.setOpcode(XCore::LSS_3r); in Decode2OpInstructionFail()
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| H A D | CMakeLists.txt | 10 XCore
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| /llvm-project-15.0.7/clang/lib/Driver/ToolChains/ |
| H A D | XCore.cpp | 25 void tools::XCore::Assembler::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
59 void tools::XCore::Linker::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
96 return new tools::XCore::Assembler(*this); in buildAssembler()
100 return new tools::XCore::Linker(*this); in buildLinker()
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | BuiltinsXCore.def | 1 //===--- BuiltinsXCore.def - XCore Builtin function database ----*- C++ -*-===//
9 // This file defines the XCore-specific builtin function database. Users of
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/MCTargetDesc/ |
| H A D | XCoreMCTargetDesc.cpp | 49 InitXCoreMCRegisterInfo(X, XCore::LR); in createXCoreMCRegisterInfo()
64 MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, XCore::SP, 0); in createXCoreMCAsmInfo()
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| H A D | CMakeLists.txt | 12 XCore
|
| /llvm-project-15.0.7/llvm/lib/Target/XCore/TargetInfo/ |
| H A D | CMakeLists.txt | 9 XCore
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| /llvm-project-15.0.7/llvm/test/CodeGen/XCore/ |
| H A D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/XCore/ |
| H A D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
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| /llvm-project-15.0.7/llvm/test/DebugInfo/XCore/ |
| H A D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/XCore/ |
| H A D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/XCore/ |
| H A D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
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| /llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/ |
| H A D | targets_with_asm_parsers.gni | 6 if (target != "ARC" && target != "NVPTX" && target != "XCore") {
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| /llvm-project-15.0.7/clang/lib/Basic/Targets/ |
| H A D | XCore.cpp | 36 return llvm::makeArrayRef(BuiltinInfo, clang::XCore::LastTSBuiltin - in getTargetBuiltins()
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