34 namespace XCore {  namespace
49   : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP),  in XCoreInstrInfo()
65   if (Opcode == XCore::LDWFI)  in isLoadFromStackSlot()
85   if (Opcode == XCore::STWFI)  in isStoreToStackSlot()
102   return BrOpc == XCore::BRFU_u6  in IsBRU()
103       || BrOpc == XCore::BRFU_lu6  in IsBRU()
104       || BrOpc == XCore::BRBU_u6  in IsBRU()
105       || BrOpc == XCore::BRBU_lu6;  in IsBRU()
109   return BrOpc == XCore::BRFT_ru6  in IsBRT()
110       || BrOpc == XCore::BRFT_lru6  in IsBRT()
111       || BrOpc == XCore::BRBT_ru6  in IsBRT()
112       || BrOpc == XCore::BRBT_lru6;  in IsBRT()
116   return BrOpc == XCore::BRFF_ru6  in IsBRF()
117       || BrOpc == XCore::BRFF_lru6  in IsBRF()
118       || BrOpc == XCore::BRBF_ru6  in IsBRF()
119       || BrOpc == XCore::BRBF_lru6;  in IsBRF()
127   return BrOpc == XCore::BR_JT  in IsBR_JT()
128       || BrOpc == XCore::BR_JT32;  in IsBR_JT()
133 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc)  in GetCondFromBranchOpc()
136     return XCore::COND_TRUE;  in GetCondFromBranchOpc()
138     return XCore::COND_FALSE;  in GetCondFromBranchOpc()
140     return XCore::COND_INVALID;  in GetCondFromBranchOpc()
146 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)  in GetCondBranchFromCond()
150   case XCore::COND_TRUE   : return XCore::BRFT_lru6;  in GetCondBranchFromCond()
151   case XCore::COND_FALSE  : return XCore::BRFF_lru6;  in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)  in GetOppositeBranchCondition()
161   case XCore::COND_TRUE   : return XCore::COND_FALSE;  in GetOppositeBranchCondition()
162   case XCore::COND_FALSE  : return XCore::COND_TRUE;  in GetOppositeBranchCondition()
212     XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode());  in analyzeBranch()
213     if (BranchCode == XCore::COND_INVALID)  in analyzeBranch()
233   XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc);  in analyzeBranch()
237   if (BranchCode != XCore::COND_INVALID  in analyzeBranch()
286       BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB);  in insertBranch()
289       unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());  in insertBranch()
298   unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());  in insertBranch()
301   BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB);  in insertBranch()
335   bool GRDest = XCore::GRRegsRegClass.contains(DestReg);  in copyPhysReg()
336   bool GRSrc  = XCore::GRRegsRegClass.contains(SrcReg);  in copyPhysReg()
339     BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg)  in copyPhysReg()
345   if (GRDest && SrcReg == XCore::SP) {  in copyPhysReg()
346     BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0);  in copyPhysReg()
350   if (DestReg == XCore::SP && GRSrc) {  in copyPhysReg()
351     BuildMI(MBB, I, DL, get(XCore::SETSP_1r))  in copyPhysReg()
374   BuildMI(MBB, I, DL, get(XCore::STWFI))  in storeRegToStackSlot()
396   BuildMI(MBB, I, DL, get(XCore::LDWFI), DestReg)  in loadRegFromStackSlot()
406   Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm()));  in reverseBranchCondition()
435     return BuildMI(MBB, MI, dl, get(XCore::MKMSK_rus), Reg)  in loadImmediate()
440     int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6;  in loadImmediate()
447   return BuildMI(MBB, MI, dl, get(XCore::LDWCP_lru6), Reg)  in loadImmediate()