44   : XCoreGenRegisterInfo(XCore::LR) {  in XCoreRegisterInfo()
69   case XCore::LDWFI:  in InsertFPImmInst()
70     BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)  in InsertFPImmInst()
75   case XCore::STWFI:  in InsertFPImmInst()
76     BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))  in InsertFPImmInst()
82   case XCore::LDAWFI:  in InsertFPImmInst()
83     BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg)  in InsertFPImmInst()
100   Register ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0);  in InsertFPConstInst()
105   case XCore::LDWFI:  in InsertFPConstInst()
106     BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)  in InsertFPConstInst()
111   case XCore::STWFI:  in InsertFPConstInst()
112     BuildMI(MBB, II, dl, TII.get(XCore::STW_l3r))  in InsertFPConstInst()
118   case XCore::LDAWFI:  in InsertFPConstInst()
119     BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)  in InsertFPConstInst()
138   case XCore::LDWFI:  in InsertSPImmInst()
139     NewOpcode = (isU6) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;  in InsertSPImmInst()
144   case XCore::STWFI:  in InsertSPImmInst()
145     NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;  in InsertSPImmInst()
151   case XCore::LDAWFI:  in InsertSPImmInst()
152     NewOpcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;  in InsertSPImmInst()
171   if (OpCode==XCore::STWFI) {  in InsertSPConstInst()
172     ScratchBase = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0);  in InsertSPConstInst()
176   BuildMI(MBB, II, dl, TII.get(XCore::LDAWSP_ru6), ScratchBase).addImm(0);  in InsertSPConstInst()
177   Register ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0);  in InsertSPConstInst()
182   case XCore::LDWFI:  in InsertSPConstInst()
183     BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)  in InsertSPConstInst()
188   case XCore::STWFI:  in InsertSPConstInst()
189     BuildMI(MBB, II, dl, TII.get(XCore::STW_l3r))  in InsertSPConstInst()
195   case XCore::LDAWFI:  in InsertSPConstInst()
196     BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)  in InsertSPConstInst()
214     XCore::R4, XCore::R5, XCore::R6, XCore::R7,  in getCalleeSavedRegs()
215     XCore::R8, XCore::R9, XCore::R10,  in getCalleeSavedRegs()
219     XCore::R4, XCore::R5, XCore::R6, XCore::R7,  in getCalleeSavedRegs()
220     XCore::R8, XCore::R9,  in getCalleeSavedRegs()
233   Reserved.set(XCore::CP);  in getReservedRegs()
234   Reserved.set(XCore::DP);  in getReservedRegs()
235   Reserved.set(XCore::SP);  in getReservedRegs()
236   Reserved.set(XCore::LR);  in getReservedRegs()
238     Reserved.set(XCore::R10);  in getReservedRegs()
300   assert(XCore::GRRegsRegClass.contains(Reg) && "Unexpected register operand");  in eliminateFrameIndex()
322   return TFI->hasFP(MF) ? XCore::R10 : XCore::SP;  in getFrameRegister()