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Searched refs:WideVT (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp4950 unsigned NumElts = WideVT.getVectorNumElements(); in WidenVecRes_MGATHER()
5213 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask() local
5215 MaskVT = WideVT; in WidenVSELECTMask()
5658 Res = DAG.getNode(Opcode, dl, WideVT, InOp); in WidenVecOp_Convert()
5854 if (WideVT.isScalableVector() && in WidenVecOp_STORE()
5927 EVT WideVT = StVal.getValueType(); in WidenVecOp_MSTORE() local
5941 StVal = ModifyToType(StVal, WideVT); in WidenVecOp_MSTORE()
6116 EVT WideVT = Op.getValueType(); in WidenVecOp_VECREDUCE() local
6129 if (WideVT.isScalableVector()) { in WidenVecOp_VECREDUCE()
6154 EVT WideVT = Op.getValueType(); in WidenVecOp_VECREDUCE_SEQ() local
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H A DLegalizeIntegerTypes.cpp1015 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VTSize * 2); in earlyExpandDIVFIX() local
1017 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in earlyExpandDIVFIX()
1020 LHS = DAG.getSExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX()
1021 RHS = DAG.getSExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX()
1023 LHS = DAG.getZExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX()
1024 RHS = DAG.getZExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX()
4436 EVT WideVT = in ExpandIntRes_XMULO() local
4438 SDValue LHS = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, N->getOperand(0)); in ExpandIntRes_XMULO()
4439 SDValue RHS = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, N->getOperand(1)); in ExpandIntRes_XMULO()
4440 SDValue Mul = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS); in ExpandIntRes_XMULO()
H A DTargetLowering.cpp9321 WideVT = in expandMULO()
9336 } else if (isTypeLegal(WideVT)) { in expandMULO()
9337 LHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, LHS); in expandMULO()
9338 RHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, RHS); in expandMULO()
9339 SDValue Mul = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS); in expandMULO()
9342 getShiftAmountTy(WideVT, DAG.getDataLayout())); in expandMULO()
9354 if (WideVT == MVT::i16) in expandMULO()
9356 else if (WideVT == MVT::i32) in expandMULO()
9358 else if (WideVT == MVT::i64) in expandMULO()
9360 else if (WideVT == MVT::i128) in expandMULO()
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H A DDAGCombiner.cpp7967 EVT WideVT = EVT::getIntegerVT(Context, WideNumBits); in mergeTruncStores() local
7968 if (WideVT != MVT::i16 && WideVT != MVT::i32 && WideVT != MVT::i64) in mergeTruncStores()
8010 else if (SourceValue.getValueType() != WideVT) { in mergeTruncStores()
8011 if (WideVal.getValueType() == WideVT || in mergeTruncStores()
8080 if (WideVT != SourceValue.getValueType()) { in mergeTruncStores()
9190 EVT WideVT = LeftOp.getValueType(); in combineShiftToMULH() local
9192 assert((WideVT == RightOp.getValueType()) && in combineShiftToMULH()
9197 if (WideVT.getScalarSizeInBits() != 2 * NarrowVTSize) in combineShiftToMULH()
10932 EVT WideSetCCVT = getSetCCResultType(WideVT); in visitVSELECT()
21545 EVT WideVT = N0.getValueType(); in foldExtractSubvectorFromShuffleVector() local
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H A DSelectionDAG.cpp11361 EVT WideVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(), in WidenVector() local
11363 return getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, getUNDEF(WideVT), N, in WidenVector()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp4187 EVT WideVT = MVT::i32; in lowerATOMIC_LOAD_OP() local
4188 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP()
4214 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP()
4218 SDValue NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT, in lowerATOMIC_LOAD_OP()
4227 Src2 = DAG.getNode(ISD::SHL, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP()
4231 Src2 = DAG.getNode(ISD::OR, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP()
4235 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP()
4237 DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_LOAD_OP()
4302 EVT WideVT = NarrowVT == MVT::i64 ? MVT::i64 : MVT::i32; in lowerATOMIC_CMP_SWAP() local
4303 if (NarrowVT == WideVT) { in lowerATOMIC_CMP_SWAP()
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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp14412 if (!WideVT.is256BitVector()) in lowerShuffleOfExtractsAsVperm()
14437 SDValue Shuf = DAG.getVectorShuffle(WideVT, DL, WideVec, DAG.getUNDEF(WideVT), in lowerShuffleOfExtractsAsVperm()
19100 MVT WideVT = VT; in lower1BitShuffleAsKSHIFTR() local
19203 MVT WideVT = VT; in lower1BitShuffle() local
21897 MVT WideVT = ExtVT; in LowerZERO_EXTEND_Mask() local
21919 if (WideVT != VT) in LowerZERO_EXTEND_Mask()
22459 IsStrict ? DAG.getConstantFP(0.0, dl, WideVT) : DAG.getUNDEF(WideVT); in LowerFP_TO_INT()
22489 IsStrict ? DAG.getConstantFP(0.0, dl, WideVT) : DAG.getUNDEF(WideVT); in LowerFP_TO_INT()
25368 MVT WideVT = ExtVT; in LowerSIGN_EXTEND_Mask() local
25395 if (WideVT != VT) in LowerSIGN_EXTEND_Mask()
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1743 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectLoadLane() local
1747 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane()
1795 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectPostLoadLane() local
1799 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
H A DAArch64ISelLowering.cpp11707 EVT WideVT = getPackedSVEVectorVT(InVT.getVectorElementCount()); in LowerINSERT_SUBVECTOR() local
11712 Vec1 = getSVESafeBitCast(WideVT, Vec1, DAG); in LowerINSERT_SUBVECTOR()
11715 Vec1 = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1); in LowerINSERT_SUBVECTOR()
11723 SDValue HiVec0 = DAG.getNode(AArch64ISD::UUNPKHI, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
11728 SDValue LoVec0 = DAG.getNode(AArch64ISD::UUNPKLO, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp7850 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in LowerTRUNCATEVector() local
7866 Op2 = DAG.getUNDEF(WideVT); in LowerTRUNCATEVector()
7884 Op1 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op1); in LowerTRUNCATEVector()
7885 Op2 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op2); in LowerTRUNCATEVector()
7886 return DAG.getVectorShuffle(WideVT, DL, Op1, Op2, ShuffV); in LowerTRUNCATEVector()
8420 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in widenVec() local
8429 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WideVT, Ops); in widenVec()
8451 EVT WideVT = Wide.getValueType(); in LowerINT_TO_FPVector() local
8452 unsigned WideNumElts = WideVT.getVectorNumElements(); in LowerINT_TO_FPVector()
8469 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); in LowerINT_TO_FPVector()
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/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1804 EVT WideVT = WideVal.getValueType(); in EmitTest() local
1831 if (TLI.isOperationLegal(WideVal.getOpcode(), WideVT)) { in EmitTest()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp4479 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerINSERT_VECTOR_ELT() local
4480 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerINSERT_VECTOR_ELT()
4481 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideVT, Vec, Val, Idx); in lowerINSERT_VECTOR_ELT()
4606 MVT WideVT = MVT::getVectorVT(WideEltVT, WidenVecLen); in lowerEXTRACT_VECTOR_ELT() local
4607 Vec = DAG.getNode(ISD::BITCAST, DL, WideVT, Vec); in lowerEXTRACT_VECTOR_ELT()
4618 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerEXTRACT_VECTOR_ELT() local
4619 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerEXTRACT_VECTOR_ELT()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp3052 EVT WideVT = MVT::i128; in LowerUMULO_SMULO() local
3076 RTLIB::MUL_I128, WideVT, in LowerUMULO_SMULO()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1514 EVT WideVT = in WidenOrSplitVectorLoad() local
1519 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue, in WidenOrSplitVectorLoad()