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Searched refs:VirtRegMap (Results 1 – 25 of 53) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DVirtRegMap.cpp59 char VirtRegMap::ID = 0;
63 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
78 void VirtRegMap::grow() { in grow()
127 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
167 LLVM_DUMP_METHOD void VirtRegMap::dump() const { in dump()
190 VirtRegMap *VRM;
235 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY()
248 AU.addRequired<VirtRegMap>(); in INITIALIZE_PASS_DEPENDENCY()
263 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
351 if (PhysReg == VirtRegMap::NO_PHYS_REG) { in addMBBLiveIns()
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H A DRegAllocBase.h53 class VirtRegMap; variable
67 VirtRegMap *VRM = nullptr;
85 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
H A DSplitKit.h46 class VirtRegMap; variable
100 const VirtRegMap &VRM;
170 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
261 VirtRegMap &VRM;
438 SplitEditor(SplitAnalysis &SA, LiveIntervals &LIS, VirtRegMap &VRM,
H A DLiveDebugVariables.h30 class VirtRegMap; variable
50 void emitDebugValues(VirtRegMap *VRM);
H A DRegAllocPBQP.cpp165 void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller);
169 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
176 VirtRegMap &VRM,
182 VirtRegMap &VRM) const;
562 au.addRequired<VirtRegMap>(); in getAnalysisUsage()
563 au.addPreserved<VirtRegMap>(); in getAnalysisUsage()
590 void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, in initializeGraph()
693 VirtRegMap &VRM, Spiller &VRegSpiller) { in spillVReg()
718 VirtRegMap &VRM, in mapPBQPToRegAlloc()
757 VirtRegMap &VRM) const { in finalizeAlloc()
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H A DRegAllocBasic.cpp141 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY()
193 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
194 AU.addPreserved<VirtRegMap>(); in getAnalysisUsage()
314 RegAllocBase::init(getAnalysis<VirtRegMap>(), in runOnMachineFunction()
H A DAllocationOrder.h27 class VirtRegMap; variable
84 static AllocationOrder create(unsigned VirtReg, const VirtRegMap &VRM,
H A DLiveRegMatrix.cpp42 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY()
51 AU.addRequiredTransitive<VirtRegMap>(); in getAnalysisUsage()
58 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
H A DRegAllocEvictionAdvisor.h30 class VirtRegMap; variable
142 VirtRegMap *const VRM;
H A DAllocationOrder.cpp29 AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM, in create()
H A DLiveDebugVariables.cpp478 void rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF,
484 void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
667 void emitDebugValues(VirtRegMap *VRM);
1506 void UserValue::rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF, in rewriteLocations()
1534 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) { in rewriteLocations()
1739 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, in emitDebugValues()
1806 void LDVImpl::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
1848 } else if (VRM->getStackSlot(Reg) != VirtRegMap::NO_STACK_SLOT) { in emitDebugValues()
1957 void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
H A DRegAllocGreedy.h58 class VirtRegMap; variable
144 VirtRegMap *getVirtRegMap() const { return VRM; } in getVirtRegMap()
H A DInlineSpiller.cpp91 VirtRegMap &VRM;
139 VirtRegMap &vrm) in HoistSpillHelper()
162 VirtRegMap &VRM;
196 InlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF, VirtRegMap &VRM, in InlineSpiller()
242 MachineFunction &MF, VirtRegMap &VRM, in createInlineSpiller()
1156 if (StackSlot == VirtRegMap::NO_STACK_SLOT) { in spillAll()
1625 else if (VRM.getStackSlot(Old) != VirtRegMap::NO_STACK_SLOT) in LRE_DidCloneVirtReg()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h33 class VirtRegMap : public MachineFunctionPass {
74 VirtRegMap() in VirtRegMap() function
77 VirtRegMap(const VirtRegMap &) = delete;
78 VirtRegMap &operator=(const VirtRegMap &) = delete;
204 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
H A DCalcSpillWeights.h21 class VirtRegMap; variable
48 const VirtRegMap &VRM;
58 const VirtRegMap &VRM, const MachineLoopInfo &Loops, in VirtRegAuxInfo()
80 const VirtRegMap &VRM,
H A DSpiller.h17 class VirtRegMap; variable
39 VirtRegMap &VRM, VirtRegAuxInfo &VRAI);
H A DLiveRegMatrix.h38 class VirtRegMap; variable
43 VirtRegMap *VRM;
H A DLiveRangeEdit.h40 class VirtRegMap; variable
72 VirtRegMap *VRM;
131 MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm,
H A DLiveIntervals.h51 class VirtRegMap; variable
298 void addKillFlags(const VirtRegMap*);
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86TileConfig.cpp53 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
75 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY() argument
85 VirtRegMap &VRM = getAnalysis<VirtRegMap>(); in INITIALIZE_PASS_DEPENDENCY()
126 if (VRM.getPhys(VirtReg) == VirtRegMap::NO_PHYS_REG) in INITIALIZE_PASS_DEPENDENCY()
H A DX86RegisterInfo.h162 const MachineFunction &MF, const VirtRegMap *VRM,
H A DX86RegisterInfo.cpp937 static ShapeT getTileShape(Register VirtReg, VirtRegMap *VRM, in getTileShape()
976 const VirtRegMap *VRM, in getRegAllocationHints()
986 ShapeT VirtShape = getTileShape(VirtReg, const_cast<VirtRegMap *>(VRM), MRI); in getRegAllocationHints()
993 ShapeT PhysShape = getTileShape(VReg, const_cast<VirtRegMap *>(VRM), MRI); in getRegAllocationHints()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIPreAllocateWWMRegs.cpp40 VirtRegMap *VRM;
60 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
77 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
196 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
H A DGCNNSAReassign.cpp52 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
73 VirtRegMap *VRM;
98 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
245 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.h149 const MachineFunction &MF, const VirtRegMap *VRM,

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