10c67e01eSJakob Stoklund Olesen //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
20c67e01eSJakob Stoklund Olesen //
32946cd70SChandler Carruth // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
42946cd70SChandler Carruth // See https://llvm.org/LICENSE.txt for license information.
52946cd70SChandler Carruth // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60c67e01eSJakob Stoklund Olesen //
70c67e01eSJakob Stoklund Olesen //===----------------------------------------------------------------------===//
80c67e01eSJakob Stoklund Olesen //
90c67e01eSJakob Stoklund Olesen // This file implements an allocation order for virtual registers.
100c67e01eSJakob Stoklund Olesen //
110c67e01eSJakob Stoklund Olesen // The preferred allocation order for a virtual register depends on allocation
120c67e01eSJakob Stoklund Olesen // hints and target hooks. The AllocationOrder class encapsulates all of that.
130c67e01eSJakob Stoklund Olesen //
140c67e01eSJakob Stoklund Olesen //===----------------------------------------------------------------------===//
150c67e01eSJakob Stoklund Olesen 
160c67e01eSJakob Stoklund Olesen #include "AllocationOrder.h"
17c784a1f9SJakob Stoklund Olesen #include "llvm/CodeGen/MachineFunction.h"
180c67e01eSJakob Stoklund Olesen #include "llvm/CodeGen/MachineRegisterInfo.h"
1905ff4667SAndrew Trick #include "llvm/CodeGen/RegisterClassInfo.h"
2026c9d70dSJakob Stoklund Olesen #include "llvm/CodeGen/VirtRegMap.h"
21c784a1f9SJakob Stoklund Olesen #include "llvm/Support/Debug.h"
22c784a1f9SJakob Stoklund Olesen #include "llvm/Support/raw_ostream.h"
230c67e01eSJakob Stoklund Olesen 
240c67e01eSJakob Stoklund Olesen using namespace llvm;
250c67e01eSJakob Stoklund Olesen 
261b9dde08SChandler Carruth #define DEBUG_TYPE "regalloc"
271b9dde08SChandler Carruth 
280c67e01eSJakob Stoklund Olesen // Compare VirtRegMap::getRegAllocPref().
create(unsigned VirtReg,const VirtRegMap & VRM,const RegisterClassInfo & RegClassInfo,const LiveRegMatrix * Matrix)29*6d193ba3SMircea Trofin AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM,
305d1f12d1SMatthias Braun                                         const RegisterClassInfo &RegClassInfo,
31*6d193ba3SMircea Trofin                                         const LiveRegMatrix *Matrix) {
32c784a1f9SJakob Stoklund Olesen   const MachineFunction &MF = VRM.getMachineFunction();
33c784a1f9SJakob Stoklund Olesen   const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo();
34*6d193ba3SMircea Trofin   auto Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
35*6d193ba3SMircea Trofin   SmallVector<MCPhysReg, 16> Hints;
36*6d193ba3SMircea Trofin   bool HardHints =
37*6d193ba3SMircea Trofin       TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix);
380c67e01eSJakob Stoklund Olesen 
39d34e60caSNicola Zaghen   LLVM_DEBUG({
40c784a1f9SJakob Stoklund Olesen     if (!Hints.empty()) {
41c784a1f9SJakob Stoklund Olesen       dbgs() << "hints:";
42c784a1f9SJakob Stoklund Olesen       for (unsigned I = 0, E = Hints.size(); I != E; ++I)
439d419d3bSFrancis Visoiu Mistrih         dbgs() << ' ' << printReg(Hints[I], TRI);
44c784a1f9SJakob Stoklund Olesen       dbgs() << '\n';
45c784a1f9SJakob Stoklund Olesen     }
46c784a1f9SJakob Stoklund Olesen   });
477e28db01SJakob Stoklund Olesen #ifndef NDEBUG
487e28db01SJakob Stoklund Olesen   for (unsigned I = 0, E = Hints.size(); I != E; ++I)
490d955d0bSDavid Majnemer     assert(is_contained(Order, Hints[I]) &&
507e28db01SJakob Stoklund Olesen            "Target hint is outside allocation order.");
517e28db01SJakob Stoklund Olesen #endif
52*6d193ba3SMircea Trofin   return AllocationOrder(std::move(Hints), Order, HardHints);
530cde8eb9SJakob Stoklund Olesen }
54