| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULibFunc.cpp | 436 case AMDGPULibFunc::IMG1DA: P.VectorSize = 2; break; in getNextParam()
437 case AMDGPULibFunc::IMG1DB: P.VectorSize = 1; break; in getNextParam()
438 case AMDGPULibFunc::IMG2DA: P.VectorSize = 4; break; in getNextParam()
439 case AMDGPULibFunc::IMG1D: P.VectorSize = 1; break; in getNextParam()
605 res.VectorSize = parseVecSize(param); in parseItaniumParam()
643 res.VectorSize = Prev.VectorSize; in parseItaniumParam()
650 Prev.VectorSize = res.VectorSize; in parseItaniumParam()
790 P.VectorSize == T.VectorSize && in findSubst()
843 if (p.VectorSize > 1) { in operator ()()
910 if (P.VectorSize > 1) in getIntrinsicParamType()
[all …]
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| H A D | AMDGPULibFunc.h | 294 unsigned char VectorSize; member
301 VectorSize = 1; in reset()
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| H A D | AMDGPULibCalls.cpp | 426 return FInfo.getLeads()[0].VectorSize; in getVecSize()
475 nf.getLeads()[0].VectorSize = FInfo.getLeads()[0].VectorSize; in sincosUseNative()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 247 unsigned VectorSize, MCContext &Ctx) { in ScaleVectorOffset() argument
640 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
650 MappedInst = ScaleVectorOffset(Inst, 2, VectorSize, OutContext); in HexagonProcessInstruction()
658 MappedInst = ScaleVectorOffset(Inst, 2, VectorSize, OutContext); in HexagonProcessInstruction()
666 MappedInst = ScaleVectorOffset(Inst, 1, VectorSize, OutContext); in HexagonProcessInstruction()
681 MappedInst = ScaleVectorOffset(Inst, 4, VectorSize, OutContext); in HexagonProcessInstruction()
696 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
713 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
730 MappedInst = ScaleVectorOffset(Inst, 2, VectorSize, OutContext); in HexagonProcessInstruction()
735 MappedInst = ScaleVectorOffset(Inst, 1, VectorSize, OutContext); in HexagonProcessInstruction()
[all …]
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| H A D | HexagonInstrInfo.cpp | 2770 unsigned VectorSize = TRI->getSpillSize(Hexagon::HvxVRRegClass); in isValidOffset() local
2771 assert(isPowerOf2_32(VectorSize)); in isValidOffset()
2772 if (Offset & (VectorSize-1)) in isValidOffset()
2774 return isInt<4>(Offset >> Log2_32(VectorSize)); in isValidOffset()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 442 int VectorSize = VT.getSizeInBits(); in createShuffleStride() local
444 int LaneCount = std::max(VectorSize / 128, 1); in createShuffleStride()
455 int VectorSize = VT.getSizeInBits(); in setGroupSize() local
456 int VF = VT.getVectorNumElements() / std::max(VectorSize / 128, 1); in setGroupSize()
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| /llvm-project-15.0.7/clang/utils/TableGen/ |
| H A D | ClangOpenCLBuiltinEmitter.cpp | 260 int VectorSize) const;
983 int VectorSize) const { in getTypeString()
1017 if (VectorSize > 1) { in getTypeString()
1018 S += std::to_string(VectorSize); in getTypeString()
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| H A D | NeonEmitter.cpp | 1596 int64_t VectorSize = cast<IntInit>(Expr->getArg(0))->getValue(); in emitDagShuffle() local
1597 VectorSize /= ElementSize; in emitDagShuffle()
1600 for (unsigned VI = 0; VI < Elts2.size(); VI += VectorSize) { in emitDagShuffle()
1601 for (int LI = VectorSize - 1; LI >= 0; --LI) { in emitDagShuffle()
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| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | SemaDeclAttr.cpp | 4542 llvm::APInt VectorSize(64, 0); in AddModeAttr() local
4551 !Str.substr(1, VectorStringLength).getAsInteger(10, VectorSize) && in AddModeAttr()
4552 VectorSize.isPowerOf2()) { in AddModeAttr()
4559 VectorSize = 0; in AddModeAttr()
4563 if (!VectorSize) in AddModeAttr()
4603 VectorSize.getBoolValue()) { in AddModeAttr()
4643 if (VectorSize.getBoolValue()) { in AddModeAttr()
4644 NewTy = Context.getVectorType(NewTy, VectorSize.getZExtValue(), in AddModeAttr()
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| H A D | TreeTransform.h | 14634 IntegerLiteral *VectorSize in RebuildExtVectorType() local
14637 return SemaRef.BuildExtVectorType(ElementType, VectorSize, AttributeLoc); in RebuildExtVectorType()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 6449 int VectorSize = 0; in LookupNeonLLVMIntrinsic() local
6451 VectorSize = 64; in LookupNeonLLVMIntrinsic()
6453 VectorSize = 128; in LookupNeonLLVMIntrinsic()
6461 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); in LookupNeonLLVMIntrinsic()
6468 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; in LookupNeonLLVMIntrinsic()
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| /llvm-project-15.0.7/llvm/bindings/go/llvm/ |
| H A D | ir.go | 691 func (t Type) VectorSize() int { return int(C.LLVMGetVectorSize(t.C)) } func
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | Attr.td | 2906 def VectorSize : TypeAttr {
|