| /llvm-project-15.0.7/llvm/tools/llvm-stress/ |
| H A D | llvm-stress.cpp | 372 Value *Val0 = getRandomVal(); in Act() local
373 Value *Val1 = getRandomValue(Val0->getType()); in Act()
376 if (Val0->getType()->isPointerTy() || in Act()
479 Value *Val0 = getRandomVectorValue(); in Act() local
481 Val0, in Act()
496 Value *Val0 = getRandomVectorValue(); in Act() local
524 Value *Val0 = getRandomVectorValue(); in Act() local
528 Val0, Val1, in Act()
624 Value *Val0 = getRandomVal(); in Act() local
648 Value *Val0 = getRandomVal(); in Act() local
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| /llvm-project-15.0.7/clang/test/SemaTemplate/ |
| H A D | temp_arg_enum_printing.cpp | 8 Val0, enumerator
17 NamedEnumNS::foo<Val0>(); in test()
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/ |
| H A D | AArch64SelectionDAGTest.cpp | 435 SDValue Val0 = DAG->getConstant(0, Loc, IntVT); in TEST_F() local
447 Pattern0123.push_back(Val0); in TEST_F()
455 Pattern022.push_back(Val0); in TEST_F()
457 Pattern022.push_back(Val0); in TEST_F()
459 Pattern022.push_back(Val0); in TEST_F()
461 Pattern022.push_back(Val0); in TEST_F()
463 Pattern022.push_back(Val0); in TEST_F()
465 Pattern022.push_back(Val0); in TEST_F()
507 EXPECT_EQ(Seq0123[0], Val0); in TEST_F()
532 EXPECT_EQ(Seq0123[0], Val0); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankCombiner.cpp | 61 Register Val0, Val1, Val2; member
325 {getAsVgpr(MatchInfo.Val0), getAsVgpr(MatchInfo.Val1), in applyMed3()
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| H A D | AMDGPUInstCombineIntrinsic.cpp | 529 APFloat Val0 = C0->getValueAPF(); in instCombineIntrinsic() local
531 Val0.convert(HalfSem, APFloat::rmTowardZero, &LosesInfo); in instCombineIntrinsic()
535 ConstantVector::get({ConstantFP::get(II.getContext(), Val0), in instCombineIntrinsic()
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/ |
| H A D | LegalizerHelperTest.cpp | 1445 auto Val0 = B.buildBitcast(v2s32, Copies[0]); in TEST_F() local
1448 auto And = B.buildAnd(v2s32, Val0, Val1); in TEST_F()
3505 auto Val0 = B.buildConstant(V4S8, 123); in TEST_F() local
3508 auto Select = B.buildSelect(V4S8, Cond, Val0, Val1); in TEST_F()
3531 auto VSelect = B.buildSelect(V4S8, VCond, Val0, Val1); in TEST_F()
3550 auto Val0 = B.buildConstant(V4S8, 123); in TEST_F() local
3552 auto And = B.buildAnd(V4S8, Val0, Val1); in TEST_F()
3553 auto Or = B.buildOr(V4S8, Val0, Val1); in TEST_F()
3554 auto Xor = B.buildXor(V4S8, Val0, Val1); in TEST_F()
4146 auto Val0 = B.buildBitcast(v2s32, Copies[0]); in TEST_F() local
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| /llvm-project-15.0.7/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 3505 Constant *Val0, *Val1; in parseValID() local
3509 parseGlobalTypeAndValue(Val0) || in parseValID()
3515 if (Val0->getType() != Val1->getType()) in parseValID()
3570 Constant *Val0, *Val1; in parseValID() local
3587 parseGlobalTypeAndValue(Val0) || in parseValID()
3592 if (Val0->getType() != Val1->getType()) in parseValID()
3634 Constant *Val0, *Val1; in parseValID() local
3637 parseGlobalTypeAndValue(Val0) || in parseValID()
3642 if (Val0->getType() != Val1->getType()) in parseValID()
7653 Value *Val0, *Val1; LocTy Loc0, Loc1; in parseInsertValue() local
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | f128-arith.ll | 580 declare fp128 @llvm.minnum.f128(fp128 %Val0, fp128 %Val1)
623 declare fp128 @llvm.maxnum.f128(fp128 %Val0, fp128 %Val1)
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 4834 SDValue Val0 = N->getOperand(2); in Select() local
4846 Ops.push_back(Val0); in Select()
4850 Ops.push_back(SDValue(createGPRPairNode(MVT::Untyped, Val0, Val1), 0)); in Select()
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | LangRef.rst | 14471 declare float @llvm.minnum.f32(float %Val0, float %Val1)
14472 declare double @llvm.minnum.f64(double %Val0, double %Val1)
14474 declare fp128 @llvm.minnum.f128(fp128 %Val0, fp128 %Val1)
14522 declare float @llvm.maxnum.f32(float %Val0, float %Val1)
14523 declare double @llvm.maxnum.f64(double %Val0, double %Val1)
14525 declare fp128 @llvm.maxnum.f128(fp128 %Val0, fp128 %Val1)
14571 declare float @llvm.minimum.f32(float %Val0, float %Val1)
14572 declare double @llvm.minimum.f64(double %Val0, double %Val1)
14574 declare fp128 @llvm.minimum.f128(fp128 %Val0, fp128 %Val1)
14609 declare float @llvm.maximum.f32(float %Val0, float %Val1)
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 7623 Value *Val0 = Builder.CreateExtractValue(Val, 1); in EmitARMBuiltinExpr() local
7625 Val0 = Builder.CreateZExt(Val0, Int64Ty); in EmitARMBuiltinExpr()
7629 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); in EmitARMBuiltinExpr()
9626 Value *Val0 = Builder.CreateExtractValue(Val, 1); in EmitAArch64BuiltinExpr() local
9629 Val0 = Builder.CreateZExt(Val0, Int128Ty); in EmitAArch64BuiltinExpr()
9633 Val = Builder.CreateShl(Val0, ShiftCst, "shl", true /* nuw */); in EmitAArch64BuiltinExpr()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 7607 Value *Val0 = in gather() local
7609 FixedVectorType *VecTy = FixedVectorType::get(Val0->getType(), VL.size()); in gather()
|