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Searched refs:VR128 (Results 1 – 25 of 28) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrXOP.td172 (ins VR128:$src1, VR128:$src2, VR128:$src3),
219 (VPMACSWWrr VR128:$src1, VR128:$src2, VR128:$src3)>;
222 (VPMACSDDrr VR128:$src1, VR128:$src2, VR128:$src3)>;
226 (VPMACSDQHrr VR128:$src1, VR128:$src2, VR128:$src3)>;
229 (VPMACSDQLrr VR128:$src1, VR128:$src2, VR128:$src3)>;
232 (VPMADCSWDrr VR128:$src1, VR128:$src2, VR128:$src3)>;
285 (ins VR128:$src1, VR128:$src2, VR128:$src3),
316 (ins VR128:$src1, VR128:$src2, VR128:$src3),
377 (VPCMOVrrr VR128:$src1, VR128:$src2, VR128:$src3)>;
380 (VPCMOVrrr VR128:$src1, VR128:$src2, VR128:$src3)>;
[all …]
H A DX86InstrSSE.td200 [(set VR128:$dst, (vt (OpNode VR128:$src1, VR128:$src2)))], d>,
239 VR128:$dst, VR128:$src1, VR128:$src2), 0>;
1309 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1324 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1376 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1388 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
4763 [(set VR128:$dst, (IntId128 VR128:$src1, VR128:$src2))]>,
6324 (VBLENDVPSrr VR128:$src2, VR128:$src1, VR128:$mask)>;
6327 (VBLENDVPDrr VR128:$src2, VR128:$src1, VR128:$mask)>;
7306 (ins VR128:$src1, VR128:$src2, VR128:$src3),
[all …]
H A DX86InstrKL.td20 def LOADIWKEY : I<0xDC, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
22 [(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8XS,
40 def AESENC128KL : I<0xDC, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
42 [(set VR128:$dst, EFLAGS,
43 (X86aesenc128kl VR128:$src1, addr:$src2))]>, T8XS,
46 def AESDEC128KL : I<0xDD, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
48 [(set VR128:$dst, EFLAGS,
52 def AESENC256KL : I<0xDE, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
54 [(set VR128:$dst, EFLAGS,
58 def AESDEC256KL : I<0xDF, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
[all …]
H A DX86InstrVecCompiler.td419 def : Pat<(f128 (X86fand VR128:$src1, VR128:$src2)),
420 (ANDPSrr VR128:$src1, VR128:$src2)>;
425 def : Pat<(f128 (X86for VR128:$src1, VR128:$src2)),
426 (ORPSrr VR128:$src1, VR128:$src2)>;
431 def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
432 (XORPSrr VR128:$src1, VR128:$src2)>;
440 def : Pat<(f128 (X86fand VR128:$src1, VR128:$src2)),
441 (VANDPSrr VR128:$src1, VR128:$src2)>;
446 def : Pat<(f128 (X86for VR128:$src1, VR128:$src2)),
447 (VORPSrr VR128:$src1, VR128:$src2)>;
[all …]
H A DX86InstrFMA.td341 VR128:$src1, (VT (COPY_TO_REGCLASS RC:$src2, VR128)),
434 (ins VR128:$src1, VR128:$src2, VR128:$src3),
440 (ins VR128:$src1, VR128:$src2, memop:$src3),
447 (ins VR128:$src1, memop:$src2, VR128:$src3),
458 (ins VR128:$src1, VR128:$src2, VR128:$src3),
472 (ins VR128:$src1, VR128:$src2, VR128:$src3),
476 (OpVT128 (OpNode VR128:$src1, VR128:$src2, VR128:$src3)))]>,
479 (ins VR128:$src1, VR128:$src2, f128mem:$src3),
482 [(set VR128:$dst, (OpNode VR128:$src1, VR128:$src2,
486 (ins VR128:$src1, f128mem:$src2, VR128:$src3),
[all …]
H A DX86InstrMMX.td240 (x86mmx (MMX_X86movdq2q VR128:$src)))]>;
242 def MMX_MOVQ2DQrr : MMXS2SIi8<0xD6, MRMSrcReg, (outs VR128:$dst),
244 [(set VR128:$dst,
508 defm MMX_CVTPI2PS : sse12_cvt_pint_3addr<0x2A, VR64, VR128,
571 (bc_v2i64 (v4i32 (X86cvtp2Int (v4f32 VR128:$src)))))),
572 (MMX_CVTPS2PIrr VR128:$src)>;
574 (bc_v2i64 (v4i32 (X86cvttp2si (v4f32 VR128:$src)))))),
575 (MMX_CVTTPS2PIrr VR128:$src)>;
577 (bc_v2i64 (v4i32 (X86cvtp2Int (v2f64 VR128:$src)))))),
578 (MMX_CVTPD2PIrr VR128:$src)>;
[all …]
H A DX86InstrCompiler.td594 def : Pat<(f128 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
595 (CMOV_VR128 VR128:$t, VR128:$f, timm:$cond)>;
598 def : Pat<(v16i8 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
599 (CMOV_VR128 VR128:$t, VR128:$f, timm:$cond)>;
600 def : Pat<(v8i16 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
601 (CMOV_VR128 VR128:$t, VR128:$f, timm:$cond)>;
602 def : Pat<(v4i32 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
603 (CMOV_VR128 VR128:$t, VR128:$f, timm:$cond)>;
604 def : Pat<(v4f32 (X86cmov VR128:$t, VR128:$f, timm:$cond, EFLAGS)),
605 (CMOV_VR128 VR128:$t, VR128:$f, timm:$cond)>;
[all …]
H A DX86GenRegisterBankInfo.def24 // VR128/256/512
H A DREADME.txt1204 def : Pat<(v2i32 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1206 (v2i32 (MMX_MOVDQ2Qrr VR128:$src))>;
1207 def : Pat<(v4i16 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1209 (v4i16 (MMX_MOVDQ2Qrr VR128:$src))>;
1210 def : Pat<(v8i8 (bitconvert (i64 (vector_extract (v2i64 VR128:$src),
1212 (v8i8 (MMX_MOVDQ2Qrr VR128:$src))>;
H A DX86RegisterInfo.td569 // Generic vector registers: VR64 and VR128.
572 def VR128 : RegisterClass<"X86", [v4f32, v2f64, v8f16, v16i8, v8i16, v4i32, v2i64, f128],
606 // Extended VR128 and VR256 for AVX-512 instructions
H A DX86FastISel.cpp2229 const TargetRegisterClass *VR128 = &X86::VR128RegClass; in X86FastEmitSSESelect() local
2243 Register VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, LHSReg, in X86FastEmitSSESelect()
2262 const TargetRegisterClass *VR128 = &X86::VR128RegClass; in X86FastEmitSSESelect() local
2264 Register AndReg = fastEmitInst_rr(Opc[1], VR128, CmpReg, LHSReg); in X86FastEmitSSESelect()
2265 Register AndNReg = fastEmitInst_rr(Opc[2], VR128, CmpReg, RHSReg); in X86FastEmitSSESelect()
2266 Register OrReg = fastEmitInst_rr(Opc[3], VR128, AndNReg, AndReg); in X86FastEmitSSESelect()
H A DX86ScheduleBtVer2.td63 def JFpuPRF: RegisterFile<72, [VR64, VR128, VR256], [1, 1, 2], [1, 1, 0],
H A DX86ScheduleBdVer2.td115 def PdFpuPRF : RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
H A DX86ScheduleZnver1.td112 def ZnFpuPRF: RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
H A DX86ScheduleZnver2.td113 def Zn2FpuPRF: RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
/llvm-project-15.0.7/llvm/test/TableGen/
H A DTargetInstrSpec.td4 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
5 // CHECK-NOT: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
7 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
8 // CHECK-NOT: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
64 def VR128 : RegisterClass<[v2i64, v2f64],
78 def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
83 !subst(REGCLASS, VR128, operand))))>;
85 def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
90 !subst(REGCLASS, VR128, operand))))>;
H A Dcast.td63 def VR128 : RegisterClass<[v2i64, v2f64],
73 def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
75 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_ps")) VR128:$src1, VR128:$src2))]>;
77 def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
79 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_pd")) VR128:$src1, VR128:$src2))]>;
85 Inst<opcode,(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
87 [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
H A DMultiPat.td67 def VR128 : RegisterClass<[v2i64, v2f64],
90 !subst(REGCLASS, VR128,
95 !subst(REGCLASS, VR128,
99 def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
102 def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
112 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
113 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
H A Dusevalname.td12 def VR128 : Reg;
24 defm ADD : shuffle<VR128>;
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZInstrVector.td455 def : Pat<(type (vselect (inttype VR128:$x), VR128:$y, VR128:$z)),
456 (VSEL VR128:$y, VR128:$z, VR128:$x)>;
458 (VSEL VR128:$z, VR128:$y, VR128:$x)>;
875 def : Pat<(type (and VR128:$x, VR128:$y)), (VN VR128:$x, VR128:$y)>;
877 (VNC VR128:$x, VR128:$y)>;
878 def : Pat<(type (or VR128:$x, VR128:$y)), (VO VR128:$x, VR128:$y)>;
879 def : Pat<(type (xor VR128:$x, VR128:$y)), (VX VR128:$x, VR128:$y)>;
882 (VSEL VR128:$x, VR128:$y, VR128:$z)>;
885 def : Pat<(type (z_vnot VR128:$x)), (VNO VR128:$x, VR128:$x)>;
944 def : Pat<(type (vselect (cmph VR128:$x, VR128:$y), VR128:$x, VR128:$y)),
[all …]
H A DSystemZRegisterInfo.td253 class VR128<bits<16> num, string n, FPR64 high>
287 defm VR128 : SystemZRegClass<"VR128",
304 def v128b : TypedReg<v16i8, VR128>;
305 def v128h : TypedReg<v8i16, VR128>;
306 def v128f : TypedReg<v4i32, VR128>;
307 def v128g : TypedReg<v2i64, VR128>;
308 def v128q : TypedReg<v16i8, VR128>;
309 def v128sb : TypedReg<v4f32, VR128>;
310 def v128db : TypedReg<v2f64, VR128>;
311 def v128xb : TypedReg<f128, VR128>;
[all …]
H A DSystemZInstrFormats.td3723 : InstVRRb<opcode, (outs VR128:$V1), (ins VR128:$V2, VR128:$V3, imm32zx4:$M5),
3780 (!cast<Instruction>(NAME) VR128:$V1, VR128:$V2, VR128:$V3,
4491 (!cast<Instruction>(NAME) VR128:$V1, VR128:$V2, VR128:$V3,
4540 (ins VR128:$V2, VR128:$V3, VR128:$V4, imm32zx4:$M5),
4565 (ins VR128:$V2, VR128:$V3, VR128:$V4,
4569 (!cast<Instruction>(NAME) VR128:$V1, VR128:$V2, VR128:$V3,
4590 (ins VR128:$V2, VR128:$V3, VR128:$V4, imm32zx4:$M5, imm32zx4:$M6),
4665 (ins VR128:$V1src, VR128:$V2, VR128:$V3,
4674 (ins VR128:$V2, VR128:$V3,
4701 (ins VR128:$V2, VR128:$V3, VR128:$V4, imm32zx4:$M5, imm32zx4:$M6),
[all …]
H A DSystemZInstrFP.td26 def SelectVR128 : SelectWrapper<f128, VR128>;
100 def : Pat<(fcopysign FP32:$src1, (f32 (fpround (f128 VR128:$src2)))),
101 (CPSDRsd FP32:$src1, (EXTRACT_SUBREG VR128:$src2, subreg_h64))>;
113 def : Pat<(fcopysign FP64:$src1, (f64 (fpround (f128 VR128:$src2)))),
114 (CPSDRdd FP64:$src1, (EXTRACT_SUBREG VR128:$src2, subreg_h64))>;
H A DSystemZInstrInfo.td2302 (ins imm64zx48:$enc, VR128:$V1, VR128:$V2,
2306 (ins imm64zx48:$enc, VR128:$V1, VR128:$V2,
2307 VR128:$V3, imm32zx4:$M4, imm32zx4:$M5,
2311 (ins imm64zx48:$enc, AnyReg:$R1, VR128:$V3,
2315 (ins imm64zx48:$enc, VR128:$V1,
2319 (ins imm64zx48:$enc, VR128:$V1,
2323 (ins imm64zx48:$enc, VR128:$V1,
H A DSystemZOperands.td168 !cast<RegisterOperand>("VR128"))>;

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