Lines Matching refs:VR128

20   def : Pat<(f16 (extractelt (v8f16 VR128:$src), (iPTR 0))),
21             (COPY_TO_REGCLASS (v8f16 VR128:$src), FR16)>;
22   def : Pat<(f32 (extractelt (v4f32 VR128:$src), (iPTR 0))),
23             (COPY_TO_REGCLASS (v4f32 VR128:$src), FR32)>;
24   def : Pat<(f64 (extractelt (v2f64 VR128:$src), (iPTR 0))),
25             (COPY_TO_REGCLASS (v2f64 VR128:$src), FR64)>;
40             (COPY_TO_REGCLASS FR16:$src, VR128)>;
43             (COPY_TO_REGCLASS FR32:$src, VR128)>;
46             (COPY_TO_REGCLASS FR64:$src, VR128)>;
79 defm : subvector_subreg_lowering<VR128, v4i32, VR256, v8i32,  sub_xmm>;
80 defm : subvector_subreg_lowering<VR128, v4f32, VR256, v8f32,  sub_xmm>;
81 defm : subvector_subreg_lowering<VR128, v2i64, VR256, v4i64,  sub_xmm>;
82 defm : subvector_subreg_lowering<VR128, v2f64, VR256, v4f64,  sub_xmm>;
83 defm : subvector_subreg_lowering<VR128, v8i16, VR256, v16i16, sub_xmm>;
84 defm : subvector_subreg_lowering<VR128, v16i8, VR256, v32i8,  sub_xmm>;
85 defm : subvector_subreg_lowering<VR128, v8f16, VR256, v16f16, sub_xmm>;
91 defm : subvector_subreg_lowering<VR128, v4i32, VR512, v16i32, sub_xmm>;
92 defm : subvector_subreg_lowering<VR128, v4f32, VR512, v16f32, sub_xmm>;
93 defm : subvector_subreg_lowering<VR128, v2i64, VR512, v8i64,  sub_xmm>;
94 defm : subvector_subreg_lowering<VR128, v2f64, VR512, v8f64,  sub_xmm>;
95 defm : subvector_subreg_lowering<VR128, v8i16, VR512, v32i16, sub_xmm>;
96 defm : subvector_subreg_lowering<VR128, v16i8, VR512, v64i8,  sub_xmm>;
97 defm : subvector_subreg_lowering<VR128, v8f16, VR512, v32f16, sub_xmm>;
125   defm : subvec_zero_lowering<"APD", VR128, v4f64, v2f64, sub_xmm>;
126   defm : subvec_zero_lowering<"APS", VR128, v8f32, v4f32, sub_xmm>;
127   defm : subvec_zero_lowering<"DQA", VR128, v4i64, v2i64, sub_xmm>;
128   defm : subvec_zero_lowering<"DQA", VR128, v8i32, v4i32, sub_xmm>;
129   defm : subvec_zero_lowering<"DQA", VR128, v16i16, v8i16, sub_xmm>;
130   defm : subvec_zero_lowering<"DQA", VR128, v32i8, v16i8, sub_xmm>;
157   defm : subvec_zero_lowering<"APD", VR128, v8f64, v2f64, sub_xmm>;
158   defm : subvec_zero_lowering<"APS", VR128, v16f32, v4f32, sub_xmm>;
159   defm : subvec_zero_lowering<"DQA", VR128, v8i64, v2i64, sub_xmm>;
160   defm : subvec_zero_lowering<"DQA", VR128, v16i32, v4i32, sub_xmm>;
161   defm : subvec_zero_lowering<"DQA", VR128, v32i16, v8i16, sub_xmm>;
162   defm : subvec_zero_lowering<"DQA", VR128, v64i8, v16i8, sub_xmm>;
379 def : Pat<(alignedstore (f128 VR128:$src), addr:$dst),
380           (MOVAPSmr addr:$dst, VR128:$src)>;
381 def : Pat<(store (f128 VR128:$src), addr:$dst),
382           (MOVUPSmr addr:$dst, VR128:$src)>;
391 def : Pat<(alignedstore (f128 VR128:$src), addr:$dst),
392           (VMOVAPSmr addr:$dst, VR128:$src)>;
393 def : Pat<(store (f128 VR128:$src), addr:$dst),
394           (VMOVUPSmr addr:$dst, VR128:$src)>;
416 def : Pat<(f128 (X86fand VR128:$src1, (memopf128 addr:$src2))),
417           (ANDPSrm VR128:$src1, f128mem:$src2)>;
419 def : Pat<(f128 (X86fand VR128:$src1, VR128:$src2)),
420           (ANDPSrr VR128:$src1, VR128:$src2)>;
422 def : Pat<(f128 (X86for VR128:$src1, (memopf128 addr:$src2))),
423           (ORPSrm VR128:$src1, f128mem:$src2)>;
425 def : Pat<(f128 (X86for VR128:$src1, VR128:$src2)),
426           (ORPSrr VR128:$src1, VR128:$src2)>;
428 def : Pat<(f128 (X86fxor VR128:$src1, (memopf128 addr:$src2))),
429           (XORPSrm VR128:$src1, f128mem:$src2)>;
431 def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
432           (XORPSrr VR128:$src1, VR128:$src2)>;
437 def : Pat<(f128 (X86fand VR128:$src1, (loadf128 addr:$src2))),
438           (VANDPSrm VR128:$src1, f128mem:$src2)>;
440 def : Pat<(f128 (X86fand VR128:$src1, VR128:$src2)),
441           (VANDPSrr VR128:$src1, VR128:$src2)>;
443 def : Pat<(f128 (X86for VR128:$src1, (loadf128 addr:$src2))),
444           (VORPSrm VR128:$src1, f128mem:$src2)>;
446 def : Pat<(f128 (X86for VR128:$src1, VR128:$src2)),
447           (VORPSrr VR128:$src1, VR128:$src2)>;
449 def : Pat<(f128 (X86fxor VR128:$src1, (loadf128 addr:$src2))),
450           (VXORPSrm VR128:$src1, f128mem:$src2)>;
452 def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
453           (VXORPSrr VR128:$src1, VR128:$src2)>;