| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | vector-legalizer-divergence.ll | 3 ; Tests for a bug in SelectionDAG::UpdateNodeOperands exposed by VectorLegalizer
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| H A D | simplifydemandedbits-recursion.ll | 5 ; to use return value of TLO.DAG.UpdateNodeOperands()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1899 return SDValue(DAG.UpdateNodeOperands(N, NewOps), 0); in PromoteIntOp_BUILD_VECTOR() 1930 return SDValue(DAG.UpdateNodeOperands(N, in PromoteIntOp_ScalarOp() 2002 return SDValue(DAG.UpdateNodeOperands(N, in PromoteIntOp_SINT_TO_FP() 2006 return SDValue(DAG.UpdateNodeOperands(N, in PromoteIntOp_SINT_TO_FP() 2057 SDNode *Res = DAG.UpdateNodeOperands(N, NewOps); in PromoteIntOp_MLOAD() 2085 SDNode *Res = DAG.UpdateNodeOperands(N, NewOps); in PromoteIntOp_MGATHER() 2131 return SDValue(DAG.UpdateNodeOperands(N, in PromoteIntOp_UINT_TO_FP() 2135 return SDValue(DAG.UpdateNodeOperands(N, in PromoteIntOp_UINT_TO_FP() 2173 return SDValue(DAG.UpdateNodeOperands(N, Op), 0); in PromoteIntOp_FRAMERETURNADDR() 2348 return SDValue(DAG.UpdateNodeOperands(N, NewOps), 0); in PromoteIntOp_STACKMAP() [all …]
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| H A D | LegalizeFloatTypes.cpp | 939 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), in SoftenFloatOp_BR_CC() 1023 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS, in SoftenFloatOp_SELECT_CC() 1049 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS, in SoftenFloatOp_SETCC() 1881 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), in ExpandFloatOp_BR_CC() 1965 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS, in ExpandFloatOp_SELECT_CC()
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| H A D | LegalizeTypes.cpp | 540 SDNode *M = DAG.UpdateNodeOperands(N, NewOps); in AnalyzeNewNode()
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| H A D | SelectionDAG.cpp | 9304 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { in UpdateNodeOperands() function in SelectionDAG 9329 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { in UpdateNodeOperands() function in SelectionDAG 9359 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { in UpdateNodeOperands() function in SelectionDAG 9361 return UpdateNodeOperands(N, Ops); in UpdateNodeOperands() 9365 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, in UpdateNodeOperands() function in SelectionDAG 9368 return UpdateNodeOperands(N, Ops); in UpdateNodeOperands() 9372 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, in UpdateNodeOperands() function in SelectionDAG 9375 return UpdateNodeOperands(N, Ops); in UpdateNodeOperands() 9379 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) { in UpdateNodeOperands() function in SelectionDAG 10575 UpdateNodeOperands(TokenFactor.getNode(), OldChain, NewMemOpChain); in makeEquivalentMemoryOrdering()
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| H A D | LegalizeVectorOps.cpp | 254 SDNode *Node = DAG.UpdateNodeOperands(Op.getNode(), Ops); in LegalizeOp()
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| H A D | LegalizeDAG.cpp | 1252 NewNode = DAG.UpdateNodeOperands(Node, Op0, SAO); in LegalizeOp() 1272 NewNode = DAG.UpdateNodeOperands(Node, Op0, Op1, SAO); in LegalizeOp() 1433 SDValue(DAG.UpdateNodeOperands(NewLoad.getNode(), NewLoadOperands), 0); in ExpandExtractFromVectorThroughStack()
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| H A D | LegalizeVectorTypes.cpp | 3041 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0); in SplitVecOp_EXTRACT_VECTOR_ELT() 3043 return SDValue(DAG.UpdateNodeOperands(N, Hi, in SplitVecOp_EXTRACT_VECTOR_ELT()
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| H A D | DAGCombiner.cpp | 5895 DAG.UpdateNodeOperands(And.getNode(), SDValue(FixupNode, 0), MaskOp); in BackwardsPropagateMask() 5909 DAG.UpdateNodeOperands(LogicN, Op0, And); in BackwardsPropagateMask() 5920 DAG.UpdateNodeOperands(And.getNode(), SDValue(Load, 0), MaskOp), 0); in BackwardsPropagateMask() 24943 S = cast<StoreSDNode>(DAG.UpdateNodeOperands( in parallelizeChainedStores()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1547 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op); 1548 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2); 1549 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1551 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1553 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1555 SDNode *UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops);
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 253 CurDAG->UpdateNodeOperands(GU, Ops); in tryInlineAsm()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelDAGToDAG.cpp | 219 CurDAG->UpdateNodeOperands(GU, Ops); in selectInlineAsm()
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFISelDAGToDAG.cpp | 216 Node = CurDAG->UpdateNodeOperands(Node, Chain, N1, R6Reg, N3); in Select()
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | avx512-cmp.ll | 183 ; CSE triggering on the call to UpdateNodeOperands and the resulting node not
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 2302 N = CurDAG->UpdateNodeOperands(N, N->getOperand(0), in rebalanceAddressTrees() 2305 N = CurDAG->UpdateNodeOperands(N, N->getOperand(0), N->getOperand(1), in rebalanceAddressTrees()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 804 CurDAG->UpdateNodeOperands(OrigChain.getNode(), Ops); in moveBelowOrigChain() 805 CurDAG->UpdateNodeOperands(Load.getNode(), Call.getOperand(0), in moveBelowOrigChain() 811 CurDAG->UpdateNodeOperands(Call.getNode(), Ops); in moveBelowOrigChain() 1615 CurDAG->UpdateNodeOperands(N, N->getOperand(0), In, N->getOperand(2)); in PostprocessISelDAG() 4053 SDNode *UpdatedNode = CurDAG->UpdateNodeOperands(N, N->getOperand(0), in tryShiftAmountMod()
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| H A D | X86ISelLowering.cpp | 25839 DAG.UpdateNodeOperands(User, User->getOperand(0), Dest); in LowerBRCOND()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1610 CurDAG->UpdateNodeOperands(Node, Op1, Op0, CCValid, CCMask, Op4); in Select()
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| H A D | SystemZISelLowering.cpp | 6338 DAG.UpdateNodeOperands(U, Ops); in combineLOAD()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 7485 (void)CurDAG->UpdateNodeOperands(N, N->getOperand(0), ImmOpnd, in PeepholePPC64() 7488 (void)CurDAG->UpdateNodeOperands(N, ImmOpnd, Base.getOperand(0), in PeepholePPC64() 7492 (void)CurDAG->UpdateNodeOperands(HBase.getNode(), HBase.getOperand(0), in PeepholePPC64()
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| H A D | PPCISelLowering.cpp | 8331 DAG.UpdateNodeOperands(TF.getNode(), ResChain, NewResChain); in spliceIntoChain() 15223 DAG.UpdateNodeOperands(N, N->getOperand(0), Const64, N->getOperand(2), in PerformDAGCombine()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 485 CurDAG->UpdateNodeOperands(&N, N0, N1); in PreprocessISelDAG() 5832 CurDAG->UpdateNodeOperands(GU, Ops); in tryInlineAsm()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2403 DAG.UpdateNodeOperands(User, User->getOperand(0), Dest); in LowerBRCOND()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 9447 return SDValue(DAG.UpdateNodeOperands(N, NewOps), 0); in performMemSDNodeCombine() 11713 DAG.UpdateNodeOperands(User, SDValue(NewNode, 0), Op); in adjustWritemask() 11779 return DAG.UpdateNodeOperands(Node, Ops); in legalizeTargetIndependentNode()
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