| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetPassConfig.cpp | 365 char TargetPassConfig::ID = 0;
411 TargetPassConfig::~TargetPassConfig() { in ~TargetPassConfig()
616 TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm) in TargetPassConfig() function in TargetPassConfig
664 return new TargetPassConfig(*this, PM); in createPassConfig()
667 TargetPassConfig::TargetPassConfig() in TargetPassConfig() function in TargetPassConfig
734 void TargetPassConfig::addPass(Pass *P) { in addPass()
821 void TargetPassConfig::addDebugifyPass() { in addDebugifyPass()
853 void TargetPassConfig::addIRPasses() { in addIRPasses()
1002 void TargetPassConfig::addISelPrepare() { in addISelPrepare()
1110 bool TargetPassConfig::addISelPasses() { in addISelPasses()
[all …]
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| H A D | LLVMTargetMachine.cpp | 106 static TargetPassConfig *
112 TargetPassConfig *PassConfig = TM.createPassConfig(PM); in addPassesToGenerateCode()
231 TargetPassConfig *PassConfig = in addPassesToEmitFile()
236 if (TargetPassConfig::willCompleteCodeGenPipeline()) { in addPassesToEmitFile()
259 TargetPassConfig *PassConfig = in addPassesToEmitMC()
263 assert(TargetPassConfig::willCompleteCodeGenPipeline() && in addPassesToEmitMC()
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVTargetMachine.cpp | 84 class SPIRVPassConfig : public TargetPassConfig {
87 : TargetPassConfig(TM, PM) {} in SPIRVPassConfig()
131 TargetPassConfig::addPostRegAlloc(); in addPostRegAlloc()
139 TargetPassConfig *SPIRVTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
144 TargetPassConfig::addIRPasses(); in addIRPasses()
150 TargetPassConfig::addISelPrepare(); in addISelPrepare()
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| /llvm-project-15.0.7/llvm/lib/Target/DirectX/ |
| H A D | DirectXTargetMachine.cpp | 60 class DirectXPassConfig : public TargetPassConfig {
63 : TargetPassConfig(TM, PM) {} in DirectXPassConfig()
97 if (TargetPassConfig::willCompleteCodeGenPipeline()) { in addPassesToEmitFile()
105 if (TargetPassConfig::willCompleteCodeGenPipeline()) { in addPassesToEmitFile()
128 TargetPassConfig *DirectXTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Combiner.h | 23 class TargetPassConfig; variable
28 Combiner(CombinerInfo &CombinerInfo, const TargetPassConfig *TPC);
39 const TargetPassConfig *TPC;
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreTargetMachine.cpp | 64 class XCorePassConfig : public TargetPassConfig {
67 : TargetPassConfig(TM, PM) {} in XCorePassConfig()
81 TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
88 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRTargetMachine.cpp | 60 class AVRPassConfig : public TargetPassConfig {
63 : TargetPassConfig(TM, PM) {} in AVRPassConfig()
76 TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
86 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VETargetMachine.cpp | 102 class VEPassConfig : public TargetPassConfig {
105 : TargetPassConfig(TM, PM) {} in VEPassConfig()
117 TargetPassConfig *VETargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
124 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyTargetMachine.cpp | 312 class WebAssemblyPassConfig final : public TargetPassConfig {
315 : TargetPassConfig(TM, PM) {} in WebAssemblyPassConfig()
344 TargetPassConfig *
451 TargetPassConfig::addIRPasses(); in addIRPasses()
461 TargetPassConfig::addISelPrepare(); in addISelPrepare()
465 (void)TargetPassConfig::addInstSelector(); in addInstSelector()
502 TargetPassConfig::addPostRegAlloc(); in addPostRegAlloc()
506 TargetPassConfig::addPreEmitPass(); in addPreEmitPass()
575 TargetPassConfig::addPreISel(); in addPreISel()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYTargetMachine.cpp | 90 class CSKYPassConfig : public TargetPassConfig {
93 : TargetPassConfig(TM, PM) {} in CSKYPassConfig()
106 TargetPassConfig *CSKYTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
112 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFTargetMachine.cpp | 85 class BPFPassConfig : public TargetPassConfig {
88 : TargetPassConfig(TM, PM) {} in BPFPassConfig()
101 TargetPassConfig *BPFTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
148 TargetPassConfig::addIRPasses(); in addIRPasses()
169 TargetPassConfig::addMachineSSAOptimization(); in addMachineSSAOptimization()
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchTargetMachine.cpp | 94 class LoongArchPassConfig : public TargetPassConfig {
97 : TargetPassConfig(TM, PM) {} in LoongArchPassConfig()
108 TargetPassConfig *
116 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430TargetMachine.cpp | 56 class MSP430PassConfig : public TargetPassConfig {
59 : TargetPassConfig(TM, PM) {} in MSP430PassConfig()
70 TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCTargetMachine.cpp | 49 class ARCPassConfig : public TargetPassConfig {
52 : TargetPassConfig(TM, PM) {} in ARCPassConfig()
65 TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
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| H A D | ARCTargetMachine.h | 21 class TargetPassConfig; variable
40 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiTargetMachine.cpp | 77 class LanaiPassConfig : public TargetPassConfig {
80 : TargetPassConfig(TM, *PassManager) {} in LanaiPassConfig()
92 TargetPassConfig *
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsPreLegalizerCombiner.cpp | 86 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
100 auto *TPC = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
110 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| H A D | MipsModuleISelDAGToDAG.cpp | 36 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
49 auto &TPC = getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
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| H A D | MipsPostLegalizerCombiner.cpp | 97 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
118 auto *TPC = &getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
138 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetMachine.cpp | 137 class RISCVPassConfig : public TargetPassConfig {
140 : TargetPassConfig(TM, PM) {} in RISCVPassConfig()
184 TargetPassConfig *RISCVTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
197 TargetPassConfig::addIRPasses(); in addIRPasses()
252 TargetPassConfig::addMachineSSAOptimization(); in addMachineSSAOptimization()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetPassConfig.h | 84 class TargetPassConfig : public ImmutablePass {
142 TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm);
144 TargetPassConfig();
146 ~TargetPassConfig() override;
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| /llvm-project-15.0.7/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | LiveDebugValues.h | 15 class TargetPassConfig; variable
28 TargetPassConfig *TPC, unsigned InputBBLimit,
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcTargetMachine.cpp | 139 class SparcPassConfig : public TargetPassConfig {
142 : TargetPassConfig(TM, PM) {} in SparcPassConfig()
154 TargetPassConfig *SparcTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
161 TargetPassConfig::addIRPasses(); in addIRPasses()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64O0PreLegalizerCombiner.cpp | 131 AU.addRequired<TargetPassConfig>(); in getAnalysisUsage()
148 auto &TPC = getAnalysis<TargetPassConfig>(); in runOnMachineFunction()
162 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetMachine.cpp | 224 class SystemZPassConfig : public TargetPassConfig {
227 : TargetPassConfig(TM, PM) {} in SystemZPassConfig()
258 TargetPassConfig::addIRPasses(); in addIRPasses()
336 TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
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