| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | BuiltinsHexagonDep.def | 14 TARGET_BUILTIN(__builtin_HEXAGON_A2_abs, "ii", "", V5) 15 TARGET_BUILTIN(__builtin_HEXAGON_A2_absp, "LLiLLi", "", V5) 16 TARGET_BUILTIN(__builtin_HEXAGON_A2_abssat, "ii", "", V5) 17 TARGET_BUILTIN(__builtin_HEXAGON_A2_add, "iii", "", V5) 35 TARGET_BUILTIN(__builtin_HEXAGON_A2_and, "iii", "", V5) 38 TARGET_BUILTIN(__builtin_HEXAGON_A2_aslh, "ii", "", V5) 39 TARGET_BUILTIN(__builtin_HEXAGON_A2_asrh, "ii", "", V5) 46 TARGET_BUILTIN(__builtin_HEXAGON_A2_max, "iii", "", V5) 54 TARGET_BUILTIN(__builtin_HEXAGON_A2_neg, "ii", "", V5) 57 TARGET_BUILTIN(__builtin_HEXAGON_A2_not, "ii", "", V5) [all …]
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| H A D | BuiltinsX86.def | 21 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 44 TARGET_BUILTIN(__builtin_ia32_readeflags_u32, "Ui", "n", "") 49 TARGET_BUILTIN(__builtin_ia32_femms, "v", "n", "3dnow") 85 TARGET_BUILTIN(_mm_prefetch, "vcC*i", "nc", "mmx") 86 TARGET_BUILTIN(__builtin_ia32_emms, "v", "n", "mmx") 296 TARGET_BUILTIN(__builtin_ia32_sfence, "v", "n", "sse") 331 TARGET_BUILTIN(__builtin_ia32_pause, "v", "n", "") 678 TARGET_BUILTIN(__builtin_ia32_wbinvd, "v", "n", "") 818 TARGET_BUILTIN(__builtin_ia32_xend, "v", "n", "rtm") 820 TARGET_BUILTIN(__builtin_ia32_xtest, "i", "n", "rtm") [all …]
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| H A D | BuiltinsSystemZ.def | 16 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 25 TARGET_BUILTIN(__builtin_tend, "i", "n", "transactional-execution") 35 TARGET_BUILTIN(__builtin_s390_lcbb, "UivC*Ii", "nc", "vector") 36 TARGET_BUILTIN(__builtin_s390_vlbb, "V16ScvC*Ii", "", "vector") 37 TARGET_BUILTIN(__builtin_s390_vll, "V16ScUivC*", "", "vector") 38 TARGET_BUILTIN(__builtin_s390_vstl, "vV16ScUiv*", "", "vector") 53 TARGET_BUILTIN(__builtin_s390_vuphb, "V8SsV16Sc", "nc", "vector") 54 TARGET_BUILTIN(__builtin_s390_vuphh, "V4SiV8Ss", "nc", "vector") 56 TARGET_BUILTIN(__builtin_s390_vuplb, "V8SsV16Sc", "nc", "vector") 57 TARGET_BUILTIN(__builtin_s390_vuplhw, "V4SiV8Ss", "nc", "vector") [all …]
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| H A D | BuiltinsWebAssembly.def | 18 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 29 TARGET_BUILTIN(__builtin_wasm_tls_size, "z", "nc", "bulk-memory") 30 TARGET_BUILTIN(__builtin_wasm_tls_align, "z", "nc", "bulk-memory") 31 TARGET_BUILTIN(__builtin_wasm_tls_base, "v*", "nU", "bulk-memory") 41 TARGET_BUILTIN(__builtin_wasm_rethrow, "v", "r", "exception-handling") 82 TARGET_BUILTIN(__builtin_wasm_abs_i16x8, "V8sV8s", "nc", "simd128") 83 TARGET_BUILTIN(__builtin_wasm_abs_i32x4, "V4iV4i", "nc", "simd128") 127 TARGET_BUILTIN(__builtin_wasm_abs_f32x4, "V4fV4f", "nc", "simd128") 128 TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", "simd128") 139 TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128") [all …]
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| H A D | BuiltinsX86_64.def | 16 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 38 TARGET_BUILTIN(__builtin_ia32_readeflags_u64, "UOi", "n", "") 57 TARGET_BUILTIN(__builtin_ia32_fxrstor64, "vv*", "n", "fxsr") 58 TARGET_BUILTIN(__builtin_ia32_fxsave64, "vv*", "n", "fxsr") 65 TARGET_BUILTIN(__builtin_ia32_incsspq, "vUOi", "n", "shstk") 67 TARGET_BUILTIN(__builtin_ia32_wrssq, "vUOiv*", "n", "shstk") 75 TARGET_BUILTIN(__builtin_ia32_tzcnt_u64, "UOiUOi", "nc", "") 103 TARGET_BUILTIN(__builtin_ia32_clui, "v", "n", "uintr") 104 TARGET_BUILTIN(__builtin_ia32_stui, "v", "n", "uintr") 105 TARGET_BUILTIN(__builtin_ia32_testui, "Uc", "n", "uintr") [all …]
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| H A D | BuiltinsRISCV.def | 14 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 19 TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "zbb") 21 TARGET_BUILTIN(__builtin_riscv_clz_32, "ZiZi", "nc", "zbb") 23 TARGET_BUILTIN(__builtin_riscv_ctz_32, "ZiZi", "nc", "zbb") 29 TARGET_BUILTIN(__builtin_riscv_clmulr, "LiLiLi", "nc", "zbc") 32 TARGET_BUILTIN(__builtin_riscv_xperm4, "LiLiLi", "nc", "zbkx") 33 TARGET_BUILTIN(__builtin_riscv_xperm8, "LiLiLi", "nc", "zbkx") 37 TARGET_BUILTIN(__builtin_riscv_bcompress_64, "WiWiWi", "nc", 39 TARGET_BUILTIN(__builtin_riscv_bdecompress_32, "ZiZiZi", "nc", 79 TARGET_BUILTIN(__builtin_riscv_brev8, "LiLi", "nc", "zbkb") [all …]
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| H A D | BuiltinsNVPTX.def | 16 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 114 TARGET_BUILTIN(__nvvm_fmin_f16, "hhh", "", AND(SM_80, PTX70)) 156 TARGET_BUILTIN(__nvvm_fmax_f16, "hhh", "", AND(SM_80, PTX70)) 531 TARGET_BUILTIN(__nvvm_fns, "UiUiUii", "n", PTX60) 540 TARGET_BUILTIN(__nvvm_bar_warp_sync, "vUi", "n", PTX60) 541 TARGET_BUILTIN(__nvvm_barrier_sync, "vUi", "n", PTX60) 570 TARGET_BUILTIN(__nvvm_vote_all_sync, "bUib", "", PTX60) 571 TARGET_BUILTIN(__nvvm_vote_any_sync, "bUib", "", PTX60) 572 TARGET_BUILTIN(__nvvm_vote_uni_sync, "bUib", "", PTX60) 666 TARGET_BUILTIN(__nvvm_atom_add_gen_d, "ddD*d", "n", SM_60) [all …]
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| H A D | BuiltinsHexagon.def | 16 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 57 TARGET_BUILTIN(__builtin_SI_to_SXTHI_asrh, "ii", "", V5) 59 TARGET_BUILTIN(__builtin_brev_ldw, "v*i*Ci*iC", "", V5) 60 TARGET_BUILTIN(__builtin_brev_ldh, "v*s*Cs*iC", "", V5) 71 TARGET_BUILTIN(__builtin_brev_stw, "i*Ci*iiC", "", V5) 72 TARGET_BUILTIN(__builtin_brev_sth, "s*Cs*iiC", "", V5) 73 TARGET_BUILTIN(__builtin_brev_sthhi, "s*Cs*iiC", "", V5) 74 TARGET_BUILTIN(__builtin_brev_stb, "c*Cc*iiC", "", V5) 76 TARGET_BUILTIN(__builtin_circ_stw, "i*i*iiIi", "", V5) 77 TARGET_BUILTIN(__builtin_circ_sth, "s*s*iiIi", "", V5) [all …]
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| H A D | BuiltinsAMDGPU.def | 21 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 179 TARGET_BUILTIN(__builtin_amdgcn_rcph, "hh", "nc", "16-bit-insts") 180 TARGET_BUILTIN(__builtin_amdgcn_sqrth, "hh", "nc", "16-bit-insts") 181 TARGET_BUILTIN(__builtin_amdgcn_rsqh, "hh", "nc", "16-bit-insts") 182 TARGET_BUILTIN(__builtin_amdgcn_sinh, "hh", "nc", "16-bit-insts") 183 TARGET_BUILTIN(__builtin_amdgcn_cosh, "hh", "nc", "16-bit-insts") 184 TARGET_BUILTIN(__builtin_amdgcn_ldexph, "hhi", "nc", "16-bit-insts") 187 TARGET_BUILTIN(__builtin_amdgcn_fracth, "hh", "nc", "16-bit-insts") 190 TARGET_BUILTIN(__builtin_amdgcn_mov_dpp, "iiIiIiIiIb", "nc", "dpp") 199 TARGET_BUILTIN(__builtin_amdgcn_fmed3h, "hhhh", "nc", "gfx9-insts") [all …]
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| H A D | BuiltinsBPF.def | 16 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 17 # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) 21 TARGET_BUILTIN(__builtin_preserve_field_info, "Ui.", "t", "") 24 TARGET_BUILTIN(__builtin_btf_type_id, "LUi.", "t", "") 27 TARGET_BUILTIN(__builtin_preserve_type_info, "Ui.", "t", "") 30 TARGET_BUILTIN(__builtin_preserve_enum_value, "Li.", "t", "") 33 #undef TARGET_BUILTIN
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| H A D | BuiltinsRISCVVector.def | 14 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 15 # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) 21 #undef TARGET_BUILTIN
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| H A D | BuiltinsVE.def | 14 #if defined(BUILTIN) && !defined(TARGET_BUILTIN) 15 # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) 32 #undef TARGET_BUILTIN
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| /llvm-project-15.0.7/clang/lib/Basic/Targets/ |
| H A D | RISCV.cpp | 200 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro 205 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro
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| H A D | SystemZ.cpp | 26 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro
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| H A D | Hexagon.cpp | 194 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro
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| H A D | WebAssembly.cpp | 26 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro
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| H A D | NVPTX.cpp | 28 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro
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| H A D | AMDGPU.cpp | 91 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro
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| H A D | X86.cpp | 28 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro 36 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ macro
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