| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | InterleavedAccessPass.cpp | 301 SmallVector<ShuffleVectorInst *, 4> Shuffles; in lowerInterleavedLoad() local 325 Shuffles.push_back(SVI); in lowerInterleavedLoad() 328 if (Shuffles.empty() && BinOpShuffles.empty()) in lowerInterleavedLoad() 335 auto *FirstSVI = Shuffles.size() > 0 ? Shuffles[0] : BinOpShuffles[0]; in lowerInterleavedLoad() 348 for (auto *Shuffle : Shuffles) { in lowerInterleavedLoad() 375 if (!tryReplaceExtracts(Extracts, Shuffles)) in lowerInterleavedLoad() 389 append_range(DeadInsts, Shuffles); in lowerInterleavedLoad() 420 Shuffles.push_back(NewSVI1); in replaceBinOpShuffles() 422 Shuffles.push_back(NewSVI2); in replaceBinOpShuffles() 430 ArrayRef<ShuffleVectorInst *> Shuffles) { in tryReplaceExtracts() argument [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 55 ArrayRef<ShuffleVectorInst *> Shuffles; member in __anondaf74ed60111::X86InterleavedAccessGroup 129 VectorType *ShuffleVecTy = Shuffles[0]->getType(); in isSupported() 148 WideInstSize = DL.getTypeSizeInBits(Shuffles[0]->getType()); in isSupported() 562 MVT VT = MVT::getVT(Shuffles[0]->getType()); in deinterleave8bitStride3() 724 auto *ShuffleTy = cast<FixedVectorType>(Shuffles[0]->getType()); in lowerIntoOptimizedSequence() 757 for (unsigned i = 0, e = Shuffles.size(); i < e; ++i) in lowerIntoOptimizedSequence() 769 decompose(Shuffles[0], Factor, in lowerIntoOptimizedSequence() 811 LoadInst *LI, ArrayRef<ShuffleVectorInst *> Shuffles, in lowerInterleavedLoad() argument 815 assert(!Shuffles.empty() && "Empty shufflevector input"); in lowerInterleavedLoad() 816 assert(Shuffles.size() == Indices.size() && in lowerInterleavedLoad() [all …]
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| H A D | X86ISelLowering.h | 1476 ArrayRef<ShuffleVectorInst *> Shuffles,
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| H A D | X86ScheduleZnver3.td | 243 // Data Shuffles, Packs, Unpacks, Permute 314 // Data Shuffles, Packs, Unpacks, Permute
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 1278 SmallVector<ShuffleVectorInst *> Shuffles; in foldSelectShuffle() local 1287 if (!llvm::is_contained(Shuffles, SV)) in foldSelectShuffle() 1288 Shuffles.push_back(SV); in foldSelectShuffle() 1296 if (FromReduction && Shuffles.size() > 1) in foldSelectShuffle() 1302 for (ShuffleVectorInst *SV : Shuffles) { in foldSelectShuffle() 1306 Shuffles.push_back(SSV); in foldSelectShuffle() 1320 for (ShuffleVectorInst *SVN : Shuffles) { in foldSelectShuffle() 1483 CostBefore += std::accumulate(Shuffles.begin(), Shuffles.end(), in foldSelectShuffle() 1545 Builder.SetInsertPoint(Shuffles[S]); in foldSelectShuffle() 1547 replaceValue(*Shuffles[S], *NSV); in foldSelectShuffle() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VVPNodes.def | 121 // Shuffles.
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 485 ///// Shuffles { 504 ///// } Shuffles
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| H A D | Intrinsics.td | 1606 // Shuffles
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 659 ArrayRef<ShuffleVectorInst *> Shuffles,
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| H A D | ARMISelLowering.cpp | 21332 LoadInst *LI, ArrayRef<ShuffleVectorInst *> Shuffles, in lowerInterleavedLoad() argument 21337 assert(Shuffles.size() == Indices.size() && in lowerInterleavedLoad() 21428 for (unsigned i = 0; i < Shuffles.size(); i++) { in lowerInterleavedLoad() 21429 ShuffleVectorInst *SV = Shuffles[i]; in lowerInterleavedLoad() 21448 for (ShuffleVectorInst *SVI : Shuffles) { in lowerInterleavedLoad() 21561 append_range(Ops, Shuffles); in lowerInterleavedStore() 21577 append_range(Ops, Shuffles); in lowerInterleavedStore() 21593 SmallVector<Value *, 4> Shuffles; in lowerInterleavedStore() local 21599 Shuffles.push_back(Builder.CreateShuffleVector( in lowerInterleavedStore() 21616 Shuffles.push_back(Builder.CreateShuffleVector( in lowerInterleavedStore() [all …]
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| H A D | ARMInstrNEON.td | 7029 // Other Vector Shuffles.
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 610 ArrayRef<ShuffleVectorInst *> Shuffles,
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| H A D | AArch64ISelLowering.cpp | 13031 LoadInst *LI, ArrayRef<ShuffleVectorInst *> Shuffles, in lowerInterleavedLoad() argument 13035 assert(!Shuffles.empty() && "Empty shufflevector input"); in lowerInterleavedLoad() 13036 assert(Shuffles.size() == Indices.size() && in lowerInterleavedLoad() 13041 VectorType *VTy = Shuffles[0]->getType(); in lowerInterleavedLoad() 13142 for (unsigned i = 0; i < Shuffles.size(); i++) { in lowerInterleavedLoad() 13143 ShuffleVectorInst *SVI = Shuffles[i]; in lowerInterleavedLoad() 13167 for (ShuffleVectorInst *SVI : Shuffles) { in lowerInterleavedLoad()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 20636 SmallVector<SDValue, 4> Shuffles; in reduceBuildVecToShuffle() local 20645 Shuffles.push_back(Shuffle); in reduceBuildVecToShuffle() 20657 if (Shuffles.size() == 1) in reduceBuildVecToShuffle() 20658 return Shuffles[0]; in reduceBuildVecToShuffle() 20663 Vec = Shuffles.size() - 1; in reduceBuildVecToShuffle() 20679 if (Shuffles.size() % 2) in reduceBuildVecToShuffle() 20680 Shuffles.push_back(DAG.getUNDEF(VT)); in reduceBuildVecToShuffle() 20684 Shuffles[CurSize] = DAG.getUNDEF(VT); in reduceBuildVecToShuffle() 20691 SDValue L = Shuffles[Left]; in reduceBuildVecToShuffle() 20700 SDValue R = Shuffles[Right]; in reduceBuildVecToShuffle() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrAltivec.td | 481 // Shuffles. 985 // Shuffles.
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/GPU/IR/ |
| H A D | GPUOps.td | 750 let summary = "Shuffles values within a subgroup.";
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2833 ArrayRef<ShuffleVectorInst *> Shuffles, in lowerInterleavedLoad() argument
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrSIMD.td | 541 // Shuffles after custom lowering
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| /llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/ |
| H A D | shuffle-single-src.ll | 375 ; Test some Identity Shuffles
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | sse41.ll | 802 ;;;;;; Shuffles optimizable with a single insertps or blend instruction
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