| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | ScheduleDAGInstrs.cpp | 95 static void dumpSUList(ScheduleDAGInstrs::SUList &L) { in dumpSUList()
107 ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf, in ScheduleDAGInstrs() function in ScheduleDAGInstrs
178 void ScheduleDAGInstrs::finishBlock() { in finishBlock()
193 void ScheduleDAGInstrs::exitRegion() { in exitRegion()
197 void ScheduleDAGInstrs::addSchedBarrierDeps() { in addSchedBarrierDeps()
559 void ScheduleDAGInstrs::initSUnits() { in initSUnits()
660 void ScheduleDAGInstrs::addChainDependencies(SUnit *SU, in addChainDependencies()
720 void ScheduleDAGInstrs::buildSchedGraph(AAResults *AA, in buildSchedGraph()
1021 void ScheduleDAGInstrs::Value2SUsMap::dump() { in dump()
1162 void ScheduleDAGInstrs::dump() const { in dump()
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| H A D | MacroFusion.cpp | 53 bool llvm::fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU, in fuseInstructionPair()
142 bool scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU);
148 void apply(ScheduleDAGInstrs *DAGInstrs) override;
153 void MacroFusion::apply(ScheduleDAGInstrs *DAG) { in apply()
167 bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU) { in scheduleAdjacentImpl()
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| H A D | PostRASchedulerList.cpp | 110 class SchedulePostRATDList : public ScheduleDAGInstrs {
207 : ScheduleDAGInstrs(MF, &MLI), AA(AA) { in SchedulePostRATDList()
236 ScheduleDAGInstrs::enterRegion(bb, begin, end, regioninstrs); in enterRegion()
247 ScheduleDAGInstrs::exitRegion(); in exitRegion()
377 ScheduleDAGInstrs::startBlock(BB); in startBlock()
435 ScheduleDAGInstrs::finishBlock(); in finishBlock()
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| H A D | MachineScheduler.cpp | 190 ScheduleDAGInstrs *createMachineScheduler();
205 ScheduleDAGInstrs *createPostMachineScheduler();
337 ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() { in createMachineScheduler()
709 ScheduleDAGInstrs::startBlock(bb); in startBlock()
715 ScheduleDAGInstrs::finishBlock(); in finishBlock()
1543 void apply(ScheduleDAGInstrs *DAGInstrs) override;
1547 ScheduleDAGInstrs *DAG);
1594 ScheduleDAGInstrs *DAG) { in clusterNeighboringMemOps()
1708 ArrayRef<MemOpInfo> MemOps, ScheduleDAGInstrs *DAG, in groupMemOps()
1782 void apply(ScheduleDAGInstrs *DAGInstrs) override;
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| H A D | DFAPacketizer.cpp | 105 class DefaultVLIWScheduler : public ScheduleDAGInstrs {
132 : ScheduleDAGInstrs(MF, &MLI), AA(AA) { in DefaultVLIWScheduler()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUExportClustering.cpp | 26 void apply(ScheduleDAGInstrs *DAG) override;
59 static void buildCluster(ArrayRef<SUnit *> Exports, ScheduleDAGInstrs *DAG) { in buildCluster()
82 static void removeExportDependencies(ScheduleDAGInstrs *DAG, SUnit &SU) { in removeExportDependencies()
108 void ExportClustering::apply(ScheduleDAGInstrs *DAG) { in apply()
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| H A D | AMDGPUIGroupLP.cpp | 81 ScheduleDAGInstrs *DAG;
152 ScheduleDAGInstrs *DAG) in SchedGroup()
196 void apply(ScheduleDAGInstrs *DAGInstrs) override;
252 void apply(ScheduleDAGInstrs *DAGInstrs) override;
257 void IGroupLPDAGMutation::apply(ScheduleDAGInstrs *DAGInstrs) { in apply()
293 void SchedBarrierDAGMutation::apply(ScheduleDAGInstrs *DAGInstrs) { in apply()
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| H A D | R600TargetMachine.cpp | 38 static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { in createR600MachineScheduler()
95 ScheduleDAGInstrs *
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| H A D | AMDGPUTargetMachine.cpp | 410 static ScheduleDAGInstrs *createSIMachineScheduler(MachineSchedContext *C) { in createSIMachineScheduler()
414 static ScheduleDAGInstrs *
429 static ScheduleDAGInstrs *
440 static ScheduleDAGInstrs *createMinRegScheduler(MachineSchedContext *C) { in createMinRegScheduler()
445 static ScheduleDAGInstrs *
919 ScheduleDAGInstrs *
922 ScheduleDAGInstrs *
1133 llvm::ScheduleDAGInstrs *
1147 ScheduleDAGInstrs *GCNPassConfig::createMachineScheduler( in createMachineScheduler()
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| H A D | AMDGPUTargetMachine.h | 116 ScheduleDAGInstrs *
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| H A D | GCNVOPDUtils.cpp | 179 void apply(ScheduleDAGInstrs *DAG) override { in apply()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGMutation.h | 19 class ScheduleDAGInstrs; variable
28 virtual void apply(ScheduleDAGInstrs *DAG) = 0;
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| H A D | ScheduleDAGInstrs.h | 119 class ScheduleDAGInstrs : public ScheduleDAG {
255 explicit ScheduleDAGInstrs(MachineFunction &mf,
259 ~ScheduleDAGInstrs() override = default;
379 inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { in newSUnit()
390 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit()
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| H A D | MacroFusion.h | 26 class ScheduleDAGInstrs; variable
46 bool fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU,
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| H A D | TargetPassConfig.h | 26 class ScheduleDAGInstrs; variable
287 virtual ScheduleDAGInstrs *
294 virtual ScheduleDAGInstrs *
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| H A D | MachinePipeliner.h | 112 class SwingSchedulerDAG : public ScheduleDAGInstrs {
197 void apply(ScheduleDAGInstrs *DAG) override;
204 : ScheduleDAGInstrs(*P.MF, P.MLI, false), Pass(P), Loop(L), LIS(lis), in SwingSchedulerDAG()
285 static bool classof(const ScheduleDAGInstrs *DAG) { return true; } in classof()
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| H A D | MachineScheduler.h | 145 ScheduleDAGInstrs *(*)(MachineSchedContext *)> {
147 using ScheduleDAGCtor = ScheduleDAGInstrs *(*)(MachineSchedContext *);
273 class ScheduleDAGMI : public ScheduleDAGInstrs {
301 : ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA), in ScheduleDAGMI()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.h | 79 void apply(ScheduleDAGInstrs *DAG) override;
82 void apply(ScheduleDAGInstrs *DAG) override;
85 void apply(ScheduleDAGInstrs *DAG) override;
91 void apply(ScheduleDAGInstrs *DAG) override;
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| H A D | HexagonSubtarget.cpp | 262 void HexagonSubtarget::UsrOverflowMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
275 void HexagonSubtarget::HVXMemLatencyMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
326 void HexagonSubtarget::CallMutation::apply(ScheduleDAGInstrs *DAGInstrs) { in apply()
395 void HexagonSubtarget::BankConflictMutation::apply(ScheduleDAGInstrs *DAG) { in apply()
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| H A D | HexagonTargetMachine.cpp | 128 static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) { in createVLIWMachineSched()
318 ScheduleDAGInstrs *
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetMachine.cpp | 289 static ScheduleDAGInstrs *createPPCMachineScheduler(MachineSchedContext *C) { in createPPCMachineScheduler()
305 static ScheduleDAGInstrs *createPPCPostMachineScheduler( in createPPCPostMachineScheduler()
418 ScheduleDAGInstrs *
422 ScheduleDAGInstrs *
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetMachine.cpp | 146 ScheduleDAGInstrs *
157 ScheduleDAGInstrs *
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | misched-killflags.mir | 2 # Make sure ScheduleDAGInstrs::fixupKills does not produce invalid kill flags.
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86TargetMachine.cpp | 371 ScheduleDAGInstrs *
378 ScheduleDAGInstrs *
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMTargetMachine.cpp | 344 ScheduleDAGInstrs *
354 ScheduleDAGInstrs *
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