Searched refs:Scc (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | FixIrreducible.cpp | 272 for (auto Scc = scc_begin(G); !Scc.isAtEnd(); ++Scc) { in makeReducible() local
273 if (Scc->size() < 2) in makeReducible()
277 for (auto N : *Scc) { in makeReducible()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | BranchProbabilityInfo.cpp | 225 const std::vector<const BasicBlock *> &Scc = *It; in SccInfo() local
226 if (Scc.size() == 1) in SccInfo()
230 for (const auto *BB : Scc) { in SccInfo()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrControl.td | 18 /// RTS [x] Scc [~] TST [ ]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 8812 SDValue Scc = DAG.getNode(ISD::SRL, dl, VT, Clz, in lowerCmpEqZeroToCtlzSrl() local
8814 return DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Scc); in lowerCmpEqZeroToCtlzSrl()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 48248 SDValue Scc = DAG.getNode(ISD::SRL, dl, MVT::i32, Trunc, in lowerX86CmpEqZeroToCtlzSrl() local
48250 return Scc; in lowerX86CmpEqZeroToCtlzSrl()
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