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Searched refs:STWU (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dalloca-crspill.ll121 ; CHECK32: $r1 = STWU $r1, -80, $r1
H A Daix-csr.ll192 ; MIR32-NEXT: $r1 = STWU $r1, -288, $r1
H A Daix-csr-vector-extabi.ll164 ; MIR32-DAG: $r1 = STWU $r1, -448, $r1
H A Dconvert-rr-to-ri-instrs.mir5524 ; CHECK: STWU %3, 111, %0
5531 ; CHECK: STWU %3, 0, %0
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp259 case PPC::STWU: in decodeMemRIOperands()
/llvm-project-15.0.7/lld/ELF/Arch/
H A DPPC64.cpp58 STWU = 37, enumerator
515 case STWU: in isInstructionUpdateForm()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp661 : PPC::STWU ); in emitPrologue()
1297 BuildMI(MBB, MBBI, DL, TII.get(isPPC64 ? PPC::STDU : PPC::STWU), SPReg) in inlineStackProbe()
H A DP10InstrResources.td1828 STWU, STWU8,
H A DPPCInstrInfo.cpp4212 case PPC::STWUX: III.ImmOpcode = PPC::STWU; break; in instrHasImmForm()
H A DPPCInstrInfo.td1970 def STWU : DForm_1<37, (outs ptr_rc_nor0:$ea_res), (ins gprc:$rS, memri:$dst),
1991 (STWU $rS, iaddroff:$ptroff, $ptrreg)>;
/llvm-project-15.0.7/llvm/docs/
H A DCodeGenerator.rst1124 def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, memri:$dst),
1129 (STWU GPRC:$rS, iaddroff:$ptroff, ptr_rc:$ptrreg)>;
1132 complex operand ``dst`` of class ``memri`` in the ``STWU`` instruction.