| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 448 STRICT_SINT_TO_FP, enumerator
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 295 if (Op.getOpcode() == ISD::STRICT_SINT_TO_FP || in LegalizeOp() 546 case ISD::STRICT_SINT_TO_FP: in Promote() 1353 (IsStrict && TLI.getOperationAction(ISD::STRICT_SINT_TO_FP, VT) == in ExpandUINT_TO_FLOAT() 1389 SDValue fHI = DAG.getNode(ISD::STRICT_SINT_TO_FP, DL, in ExpandUINT_TO_FLOAT() 1394 SDValue fLO = DAG.getNode(ISD::STRICT_SINT_TO_FP, DL, in ExpandUINT_TO_FLOAT()
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| H A D | LegalizeDAG.cpp | 1013 case ISD::STRICT_SINT_TO_FP: in LegalizeOp() 2321 bool isSigned = (Node->getOpcode() == ISD::STRICT_SINT_TO_FP || in ExpandLegalINT_TO_FP() 2541 N->getOpcode() == ISD::STRICT_SINT_TO_FP; in PromoteLegalINT_TO_FP() 2545 unsigned SIntOp = IsStrict ? ISD::STRICT_SINT_TO_FP : ISD::SINT_TO_FP; in PromoteLegalINT_TO_FP() 2966 case ISD::STRICT_SINT_TO_FP: in ExpandNode() 3887 case ISD::STRICT_SINT_TO_FP: in ExpandNode() 4117 DAG.getNode(ISD::STRICT_SINT_TO_FP, SDLoc(Node), in ConvertNodeToLibcall() 4243 case ISD::STRICT_SINT_TO_FP: in ConvertNodeToLibcall() 4250 Node->getOpcode() == ISD::STRICT_SINT_TO_FP; in ConvertNodeToLibcall() 4458 Node->getOpcode() == ISD::STRICT_SINT_TO_FP || in PromoteNode() [all …]
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| H A D | SelectionDAGDumper.cpp | 353 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 135 case ISD::STRICT_SINT_TO_FP: in SoftenFloatResult() 770 N->getOpcode() == ISD::STRICT_SINT_TO_FP; in SoftenFloatRes_XINT_TO_FP() 1271 case ISD::STRICT_SINT_TO_FP: in ExpandFloatResult() 1672 N->getOpcode() == ISD::STRICT_SINT_TO_FP; in ExpandFloatRes_XINT_TO_FP()
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| H A D | LegalizeVectorTypes.cpp | 650 case ISD::STRICT_SINT_TO_FP: in ScalarizeVectorOperand() 2724 case ISD::STRICT_SINT_TO_FP: in SplitVectorOperand() 4094 case ISD::STRICT_SINT_TO_FP: in WidenVecRes_StrictFP() 5461 case ISD::STRICT_SINT_TO_FP: in WidenVectorOperand()
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| H A D | SelectionDAGISel.cpp | 1130 case ISD::STRICT_SINT_TO_FP: in DoInstructionSelection()
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| H A D | LegalizeIntegerTypes.cpp | 1653 case ISD::STRICT_SINT_TO_FP: Res = PromoteIntOp_STRICT_SINT_TO_FP(N); break; in PromoteIntegerOperand() 4710 case ISD::STRICT_SINT_TO_FP: in ExpandIntegerOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 246 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i1, Promote); in PPCTargetLowering() 247 AddPromotedToType(ISD::STRICT_SINT_TO_FP, MVT::i1, in PPCTargetLowering() 274 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i1, Custom); in PPCTargetLowering() 517 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i32, Legal); in PPCTargetLowering() 532 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i32, Expand); in PPCTargetLowering() 672 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i64, Custom); in PPCTargetLowering() 8358 UI->getOpcode() != ISD::STRICT_SINT_TO_FP && in directMoveIsProfitable() 8370 Op.getOpcode() == ISD::STRICT_SINT_TO_FP; in convertIntToFP() 8406 Op.getOpcode() == ISD::STRICT_SINT_TO_FP; in LowerINT_TO_FPDirectMove() 8496 Op.getOpcode() == ISD::STRICT_SINT_TO_FP; in LowerINT_TO_FP() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 245 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i8, Promote); in X86TargetLowering() 249 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i16, Custom); in X86TargetLowering() 252 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i32, Custom); in X86TargetLowering() 256 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i64, Custom); in X86TargetLowering() 2363 ISD::STRICT_SINT_TO_FP, in X86TargetLowering() 20671 Op.getOpcode() == ISD::STRICT_SINT_TO_FP || in LowerI64IntToFP_AVX512DQ() 20713 Op.getOpcode() == ISD::STRICT_SINT_TO_FP || in LowerI64IntToFP16() 29575 Op->getOpcode() == ISD::STRICT_SINT_TO_FP) in LowerWin64_INT128_TO_FP() 32247 case ISD::STRICT_SINT_TO_FP: in LowerOperation() 32950 case ISD::STRICT_SINT_TO_FP: in ReplaceNodeResults() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 230 setOperationAction(ISD::STRICT_SINT_TO_FP, VT, Legal); in SystemZTargetLowering() 423 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::v2i64, Legal); in SystemZTargetLowering() 424 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::v2f64, Legal); in SystemZTargetLowering() 443 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::v4i32, Legal); in SystemZTargetLowering() 444 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 473 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i32, Custom); in AArch64TargetLowering() 474 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i64, Custom); in AArch64TargetLowering() 475 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i128, Custom); in AArch64TargetLowering() 973 ISD::STRICT_SINT_TO_FP, ISD::STRICT_UINT_TO_FP, ISD::STRICT_FP_ROUND}) in AArch64TargetLowering() 984 for (auto Op : {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::STRICT_SINT_TO_FP, in AArch64TargetLowering() 3975 bool IsSigned = Opc == ISD::SINT_TO_FP || Opc == ISD::STRICT_SINT_TO_FP; in LowerVectorINT_TO_FP() 5497 case ISD::STRICT_SINT_TO_FP: in LowerOperation()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 587 def strict_sint_to_fp : SDNode<"ISD::STRICT_SINT_TO_FP",
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 385 ISD::STRICT_UINT_TO_FP, ISD::STRICT_SINT_TO_FP}, in RISCVTargetLowering()
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