Home
last modified time | relevance | path

Searched refs:SETUNE (Results 1 – 25 of 38) sorted by relevance

12

/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchFloat32InstrInfo.td166 def : PatFPSetcc<SETUNE, FCMP_CUNE_S, FPR32>;
191 def : PatFPSelectcc<SETUNE, FCMP_CUNE_S, FSEL_S, FPR32>;
H A DLoongArchFloat64InstrInfo.td170 def : PatFPSetcc<SETUNE, FCMP_CUNE_D, FPR64>;
191 def : PatFPSelectcc<SETUNE, FCMP_CUNE_D, FSEL_D, FPR64>;
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1440 SETUNE, // 1 1 1 0 True if unordered or not equal enumerator
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td355 defm : BRCond_Bin_F2<SETUNE, "f2FCMPNE", BT32, MVC32>;
398 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm0, SETUNE)), bb:$imm16),
400 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETUNE)),
402 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm0, SETUNE)), FPR32Op:$rx, FPR32Op:$false),
H A DCSKYInstrInfoF1.td335 defm : BRCond_Bin<SETUNE, "FCMPNE", BT32, MVC32>;
370 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm0, SETUNE)), bb:$imm16),
372 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm0, SETUNE)),
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DAnalysis.cpp203 case FCmpInst::FCMP_UNE: return ISD::SETUNE; in getFCmpCondCode()
212 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td339 def COND_UNE : PatFrag<(ops), (OtherVT SETUNE)>;
347 def COND_UNE_NE : PatFrags<(ops), [(OtherVT SETUNE), (OtherVT SETNE)]>;
363 def COND_NE : PatFrags<(ops), [(OtherVT SETNE), (OtherVT SETUNE)]>;
H A DSIWholeQuadMode.cpp845 case ISD::SETUNE: in lowerKillF32()
H A DR600ISelLowering.cpp898 case ISD::SETUNE: in LowerSELECT_CC()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelDAGToDAG.cpp86 case ISD::SETUNE: in fpCondCode2Fcc()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td81 defm NE : ComparisonFP<SETUNE, "ne ", 0x5c, 0x62>;
H A DWebAssemblyInstrSIMD.td711 defm NE : SIMDConditionFP<"ne", SETUNE, 66>;
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp460 case ISD::SETUNE: return "setune"; in getOperationName()
H A DTargetLowering.cpp323 case ISD::SETUNE: in softenSetCCOperands()
4862 case ISD::SETUNE: NewCond = IsNegInf ? ISD::SETUGT : ISD::SETULT; break; in SimplifySetCC()
7664 IsInverted ? ISD::SETUNE : ISD::SETOEQ); in expandIS_FPCLASS()
9751 if (TLI.isCondCodeLegal(ISD::SETUNE, OpVT)) { in LegalizeSetCCCondCode()
9752 CC1 = ISD::SETUNE; in LegalizeSetCCCondCode()
9753 CC2 = ISD::SETUNE; in LegalizeSetCCCondCode()
9790 case ISD::SETUNE: in LegalizeSetCCCondCode()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp52 case ISD::SETUNE: in ISDCCtoARCCC()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp856 case ISD::SETUNE: in IntCondCCodeToICC()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4127 case ISD::SETUNE: in getPredicateForSetCC()
4168 case ISD::SETUNE: in getCRIdxForSetCC()
4205 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break; in getVCmpInst()
4249 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break; in getVCmpInst()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp304 setCondCodeAction(ISD::SETUNE, MVT::v64f16, Expand); in initializeHVXLowering()
317 setCondCodeAction(ISD::SETUNE, MVT::v32f32, Expand); in initializeHVXLowering()
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td755 def SETUNE : CondCode<"FCMP_UNE">;
1372 (setcc node:$lhs, node:$rhs, SETUNE)>;
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVSDPatterns.td958 defm : VPatFPSetCCSDNode_VV_VF_FV<SETUNE, "PseudoVMFNE", "PseudoVMFNE">;
H A DRISCVInstrInfoVVLPatterns.td1291 defm : VPatFPSetCCVL_VV_VF_FV<SETUNE, "PseudoVMFNE", "PseudoVMFNE">;
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SVEInstrInfo.td1797 defm FCMNE_PPzZZ : sve_fp_3op_p_pd_cc<0b011, "fcmne", SETUNE, SETNE, SETUNE, SETNE>;
1807 defm FCMNE_PPzZ0 : sve_fp_2op_p_pd<0b110, "fcmne", SETUNE, SETNE, SETUNE, SETNE>;
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp569 case ISD::SETUNE: in getPTXCmpMode()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1598 case ISD::SETUNE: in TranslateM68kCC()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td152 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
153 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;

12