| /llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/ |
| H A D | GISelAliasTest.cpp | 26 LLT S64 = LLT::scalar(64); in TEST_F() local
38 auto Ld1 = B.buildLoad(S64, Addr, *LoadMMO); in TEST_F()
39 auto Ld2 = B.buildLoad(S64, Addr2, *LoadMMO); in TEST_F()
49 auto VolLd1 = B.buildLoad(S64, Addr, *LoadVolMMO); in TEST_F()
78 LLT S64 = LLT::scalar(64); in TEST_F() local
88 auto Ld1 = B.buildLoad(S64, Addr, *LoadMMO); in TEST_F()
89 auto Ld2 = B.buildLoad(S64, Addr2, *LoadMMO); in TEST_F()
97 auto Ld3 = B.buildLoad(S64, Addr3, *LoadMMO); in TEST_F()
108 LLT S64 = LLT::scalar(64); in TEST_F() local
123 auto Ld1 = B.buildLoad(S64, GFI1, *LoadMMO); in TEST_F()
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| H A D | MachineIRBuilderTest.cpp | 130 LLT S64 = LLT::scalar(64); in TEST_F() local
137 B.buildFNeg(S64, Copies[0]); in TEST_F()
138 B.buildFAbs(S64, Copies[0]); in TEST_F()
163 LLT S64 = LLT::scalar(64); in TEST_F() local
192 LLT S64 = LLT::scalar(64); in TEST_F() local
197 B.buildNot(S64, Copies[0]); in TEST_F()
274 LLT S64 = LLT::scalar(64); in TEST_F() local
282 B.buildAbs(S64, Copies[0]); in TEST_F()
302 LLT S64 = LLT::scalar(64); in TEST_F() local
372 LLT S64 = LLT::scalar(64); in TEST_F() local
[all …]
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| H A D | GISelUtilsTest.cpp | 19 static const LLT S64 = LLT::scalar(64); variable
72 EXPECT_EQ(P0, getGCDType(P0, S64)); in TEST()
73 EXPECT_EQ(S64, getGCDType(S64, P0)); in TEST()
107 EXPECT_EQ(S64, getGCDType(V2S64, P0)); in TEST()
165 EXPECT_EQ(S64, getLCMType(S64, P0)); in TEST()
166 EXPECT_EQ(P0, getLCMType(P0, S64)); in TEST()
197 EXPECT_EQ(LLT::fixed_vector(12, S64), getLCMType(V4S64, V3P0)); in TEST()
205 EXPECT_EQ(V2P0, getLCMType(V2P0, S64)); in TEST()
206 EXPECT_EQ(V2S64, getLCMType(S64, V2P0)); in TEST()
216 EXPECT_EQ(V2S32, getLCMType(V2S32, S64)); in TEST()
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| H A D | LegalizerHelperTest.cpp | 2084 LLT S64{LLT::scalar(64)}; in TEST_F() local
2150 LLT S64{LLT::scalar(64)}; in TEST_F() local
2208 LLT S64{LLT::scalar(64)}; in TEST_F() local
2267 LLT S64{LLT::scalar(64)}; in TEST_F() local
2320 LLT S64{LLT::scalar(64)}; in TEST_F() local
2373 LLT S64{LLT::scalar(64)}; in TEST_F() local
2426 LLT S64{LLT::scalar(64)}; in TEST_F() local
2479 LLT S64{LLT::scalar(64)}; in TEST_F() local
2532 LLT S64{LLT::scalar(64)}; in TEST_F() local
3328 B.buildInstr(TargetOpcode::G_SDIVREM, {S64, S64}, {Copies[0], Copies[1]}); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 500 S32, S64 in AMDGPULegalizerInfo()
504 S32, S64, S16 in AMDGPULegalizerInfo()
849 .legalFor({{S64, S32}, {S32, S16}, {S64, S16}, in AMDGPULegalizerInfo()
859 .customFor({{S32, S64}, {S64, S64}}); in AMDGPULegalizerInfo()
869 .customFor({{S64, S32}, {S64, S64}}) in AMDGPULegalizerInfo()
1148 {S64, LocalPtr, S64, 32}, in AMDGPULegalizerInfo()
1328 {S64, GlobalPtr}, {S64, LocalPtr}, in AMDGPULegalizerInfo()
1691 .legalFor({S64}); in AMDGPULegalizerInfo()
2258 assert((SrcLT == S32 || SrcLT == S64) && MRI.getType(Dst) == S64); in legalizeFPTOI()
2283 if (SrcLT == S64) { in legalizeFPTOI()
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/ |
| H A D | LowLevelTypeTest.cpp | 136 const LLT S64 = LLT::scalar(64); in TEST() local
144 EXPECT_EQ(S64, S32.changeElementType(S64)); in TEST()
147 EXPECT_EQ(S32, S64.changeElementSize(32)); in TEST()
150 EXPECT_EQ(V2S64, V2S32.changeElementType(S64)); in TEST()
169 EXPECT_EQ(NXV2S64, NXV2S32.changeElementType(S64)); in TEST()
184 const LLT S64 = LLT::scalar(64); in TEST() local
189 EXPECT_EQ(S64, V2S64.changeElementCount(ElementCount::getFixed(1))); in TEST()
195 EXPECT_EQ(V2S64, S64.changeElementCount(ElementCount::getFixed(2))); in TEST()
206 EXPECT_EQ(S64, NXV2S64.changeElementCount(ElementCount::getFixed(1))); in TEST()
216 EXPECT_EQ(NXV2S64, S64.changeElementCount(ElementCount::getScalable(2))); in TEST()
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | aix64-cc-byval.ll | 112 %struct.S64 = type { [64 x i8] }
114 @gS64 = external global %struct.S64, align 1
118 call void @test_byval_64Byte(%struct.S64* byval(%struct.S64) align 1 @gS64)
122 declare void @test_byval_64Byte(%struct.S64* byval(%struct.S64) align 1)
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | inst-select-inttoptr.mir | 10 # GCN: [[S64:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
12 # GCN: [[VAL:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[S64]], 0, 0
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsABIFlagsSection.cpp | 27 case FpABIKind::S64: in getFpABIValue()
43 case FpABIKind::S64: in getFpABIString()
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| H A D | MipsABIFlagsSection.h | 23 enum class FpABIKind { ANY, XX, S32, S64, SOFT }; enumerator
181 FpABI = FpABIKind::S64; in setFpAbiFromPredicates()
186 FpABI = FpABIKind::S64; in setFpAbiFromPredicates()
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | pr10475.ll | 21 %S64 = icmp ne <8 x i32> %B61, zeroinitializer
22 %E73 = extractelement <8 x i1> %S64, i32 6
|
| /llvm-project-15.0.7/libcxx/test/std/utilities/memory/ptr.align/ |
| H A D | assume_aligned.pass.cpp | 50 struct alignas( 64) S64 { }; struct
70 S64 s64; in tests()
|
| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-bcc.ll | 21 %S64 = type <{ i64 }>
23 %Sstruct = type <{ %S64, %S32 }>
|
| /llvm-project-15.0.7/clang/test/PCH/ |
| H A D | cxx-key-functions.cpp | 72 struct S64 { virtual void f(); }; struct
88 S60, S61, S62, S63, S64, S65, S66, S67, S68, S69);
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| /llvm-project-15.0.7/clang/test/CodeGen/Inputs/ |
| H A D | linker-diagnostic1.ll | 2 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
|
| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | metadata-short-enums.ll | 3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
|
| H A D | metadata-short-wchar.ll | 3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
|
| H A D | metadata-default.ll | 3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
|
| H A D | pr25317.ll | 3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
|
| H A D | ehabi-no-landingpad.ll | 3 …8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
|
| H A D | load-address-masked.ll | 3 …8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
|
| H A D | unwind-fp.ll | 3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Lanai/ |
| H A D | set_and_hi.ll | 5 target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
|
| /llvm-project-15.0.7/llvm/test/LTO/ARM/ |
| H A D | inline-asm.ll | 6 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
|
| /llvm-project-15.0.7/llvm/test/Bitcode/ |
| H A D | thinlto-asm-noimport.ll | 5 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
|