Lines Matching refs:S64
439 const LLT S64 = LLT::scalar(64); in AMDGPULegalizerInfo() local
500 S32, S64 in AMDGPULegalizerInfo()
504 S32, S64, S16 in AMDGPULegalizerInfo()
508 S32, S64, S16, V2S16 in AMDGPULegalizerInfo()
519 .legalFor({S32, S64, V2S16, S16, V4S16, S1, S128, S256}) in AMDGPULegalizerInfo()
630 .customFor({S32, S64}) in AMDGPULegalizerInfo()
631 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
652 .legalFor({S32, S1, S64, V2S32, S16, V2S16, V4S16}) in AMDGPULegalizerInfo()
653 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
673 .legalFor({S1, S32, S64, S16, GlobalPtr, in AMDGPULegalizerInfo()
676 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
680 .legalFor({S32, S64, S16}) in AMDGPULegalizerInfo()
681 .clampScalar(0, S16, S64); in AMDGPULegalizerInfo()
707 .legalFor({S32, S64}); in AMDGPULegalizerInfo()
709 .customFor({S32, S64}); in AMDGPULegalizerInfo()
711 .customFor({S32, S64}); in AMDGPULegalizerInfo()
730 .clampScalar(0, S16, S64) in AMDGPULegalizerInfo()
734 .clampScalar(0, S16, S64) in AMDGPULegalizerInfo()
738 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
747 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
751 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
755 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
761 .clampScalar(0, S16, S64); in AMDGPULegalizerInfo()
765 .legalFor({S32, S64, S16}) in AMDGPULegalizerInfo()
767 .clampScalar(0, S16, S64); in AMDGPULegalizerInfo()
770 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
772 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
776 .customFor({S64}) in AMDGPULegalizerInfo()
777 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
779 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
782 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
784 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
789 .legalFor({{S32, S64}, {S16, S32}}) in AMDGPULegalizerInfo()
794 .legalFor({{S64, S32}, {S32, S16}}) in AMDGPULegalizerInfo()
795 .narrowScalarFor({{S64, S16}}, changeTo(0, S32)) in AMDGPULegalizerInfo()
804 .lowerFor({S64, V2S16}); in AMDGPULegalizerInfo()
810 .lowerFor({S64, S16, V2S16}); in AMDGPULegalizerInfo()
815 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
830 FRem.customFor({S16, S32, S64}); in AMDGPULegalizerInfo()
833 .customFor({S32, S64}); in AMDGPULegalizerInfo()
849 .legalFor({{S64, S32}, {S32, S16}, {S64, S16}, in AMDGPULegalizerInfo()
850 {S32, S1}, {S64, S1}, {S16, S1}}) in AMDGPULegalizerInfo()
852 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
857 .legalFor({{S32, S32}, {S64, S32}, {S16, S32}}) in AMDGPULegalizerInfo()
859 .customFor({{S32, S64}, {S64, S64}}); in AMDGPULegalizerInfo()
862 IToFP.clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
868 .legalFor({{S32, S32}, {S32, S64}, {S32, S16}}) in AMDGPULegalizerInfo()
869 .customFor({{S64, S32}, {S64, S64}}) in AMDGPULegalizerInfo()
870 .narrowScalarFor({{S64, S16}}, changeTo(0, S32)); in AMDGPULegalizerInfo()
893 .legalFor({S16, S32, S64}) in AMDGPULegalizerInfo()
894 .clampScalar(0, S16, S64) in AMDGPULegalizerInfo()
898 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
899 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
904 .customFor({S64}) in AMDGPULegalizerInfo()
905 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
915 .legalIf(all(sameSize(0, 1), typeInSet(1, {S64, S32}))) in AMDGPULegalizerInfo()
932 {S1}, {S32, S64, GlobalPtr, LocalPtr, ConstantPtr, PrivatePtr, FlatPtr}) in AMDGPULegalizerInfo()
934 {S32}, {S32, S64, GlobalPtr, LocalPtr, ConstantPtr, PrivatePtr, FlatPtr}); in AMDGPULegalizerInfo()
941 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
948 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
974 .legalFor({{S32, S32}, {S32, S64}}) in AMDGPULegalizerInfo()
977 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
988 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
995 .legalFor({{S32, S32}, {S32, S64}}) in AMDGPULegalizerInfo()
997 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
1005 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
1006 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
1059 .legalForCartesianProduct(AddrSpaces64, {S64}) in AMDGPULegalizerInfo()
1075 .legalForCartesianProduct(AddrSpaces64, {S64}) in AMDGPULegalizerInfo()
1141 {S64, GlobalPtr, S64, GlobalAlign32}, in AMDGPULegalizerInfo()
1148 {S64, LocalPtr, S64, 32}, in AMDGPULegalizerInfo()
1162 {S64, ConstantPtr, S64, GlobalAlign32}, in AMDGPULegalizerInfo()
1328 {S64, GlobalPtr}, {S64, LocalPtr}, in AMDGPULegalizerInfo()
1329 {S32, RegionPtr}, {S64, RegionPtr}}); in AMDGPULegalizerInfo()
1331 Atomics.legalFor({{S32, FlatPtr}, {S64, FlatPtr}}); in AMDGPULegalizerInfo()
1338 Atomic.legalFor({{S64, LocalPtr}}); in AMDGPULegalizerInfo()
1352 {S64, GlobalPtr}, in AMDGPULegalizerInfo()
1353 {S64, FlatPtr} in AMDGPULegalizerInfo()
1360 .customFor({{S32, GlobalPtr}, {S64, GlobalPtr}, in AMDGPULegalizerInfo()
1361 {S32, FlatPtr}, {S64, FlatPtr}}) in AMDGPULegalizerInfo()
1362 .legalFor({{S32, LocalPtr}, {S64, LocalPtr}, in AMDGPULegalizerInfo()
1363 {S32, RegionPtr}, {S64, RegionPtr}}); in AMDGPULegalizerInfo()
1368 .legalForCartesianProduct({S32, S64, S16, V2S32, V2S16, V4S16, GlobalPtr, in AMDGPULegalizerInfo()
1373 .clampScalar(0, S16, S64) in AMDGPULegalizerInfo()
1387 .legalFor({{S32, S32}, {S64, S32}}); in AMDGPULegalizerInfo()
1408 Shifts.clampScalar(0, S16, S64); in AMDGPULegalizerInfo()
1420 Shifts.clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
1464 .clampScalar(EltTypeIdx, S32, S64) in AMDGPULegalizerInfo()
1465 .clampScalar(VecTypeIdx, S32, S64) in AMDGPULegalizerInfo()
1520 .legalForCartesianProduct(AllS64Vectors, {S64}) in AMDGPULegalizerInfo()
1645 .legalFor({{S32}, {S64}}); in AMDGPULegalizerInfo()
1654 SextInReg.lowerFor({{S32}, {S64}, {S16}}); in AMDGPULegalizerInfo()
1658 SextInReg.lowerFor({{S32}, {S64}}); in AMDGPULegalizerInfo()
1663 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
1691 .legalFor({S64}); in AMDGPULegalizerInfo()
1702 .legalFor({{S32, S32}, {S64, S32}}) in AMDGPULegalizerInfo()
1704 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
2080 const LLT S64 = LLT::scalar(64); in legalizeFceil() local
2083 assert(MRI.getType(Src) == S64); in legalizeFceil()
2089 auto Trunc = B.buildIntrinsicTrunc(S64, Src); in legalizeFceil()
2091 const auto Zero = B.buildFConstant(S64, 0.0); in legalizeFceil()
2092 const auto One = B.buildFConstant(S64, 1.0); in legalizeFceil()
2096 auto Add = B.buildSelect(S64, And, One, Zero); in legalizeFceil()
2143 const LLT S64 = LLT::scalar(64); in legalizeIntrinsicTrunc() local
2146 assert(MRI.getType(Src) == S64); in legalizeIntrinsicTrunc()
2162 const auto FractMask = B.buildConstant(S64, (UINT64_C(1) << FractBits) - 1); in legalizeIntrinsicTrunc()
2167 auto SignBit64 = B.buildMerge(S64, {Zero32, SignBit}); in legalizeIntrinsicTrunc()
2169 auto Shr = B.buildAShr(S64, FractMask, Exp); in legalizeIntrinsicTrunc()
2170 auto Not = B.buildNot(S64, Shr); in legalizeIntrinsicTrunc()
2171 auto Tmp0 = B.buildAnd(S64, Src, Not); in legalizeIntrinsicTrunc()
2177 auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0); in legalizeIntrinsicTrunc()
2190 const LLT S64 = LLT::scalar(64); in legalizeITOFP() local
2193 assert(MRI.getType(Src) == S64); in legalizeITOFP()
2198 if (MRI.getType(Dst) == S64) { in legalizeITOFP()
2199 auto CvtHi = Signed ? B.buildSITOFP(S64, Unmerge.getReg(1)) in legalizeITOFP()
2200 : B.buildUITOFP(S64, Unmerge.getReg(1)); in legalizeITOFP()
2202 auto CvtLo = B.buildUITOFP(S64, Unmerge.getReg(0)); in legalizeITOFP()
2203 auto LdExp = B.buildIntrinsic(Intrinsic::amdgcn_ldexp, {S64}, false) in legalizeITOFP()
2230 auto Norm = B.buildShl(S64, Src, ShAmt); in legalizeITOFP()
2254 const LLT S64 = LLT::scalar(64); in legalizeFPTOI() local
2258 assert((SrcLT == S32 || SrcLT == S64) && MRI.getType(Dst) == S64); in legalizeFPTOI()
2283 if (SrcLT == S64) { in legalizeFPTOI()
2284 K0 = B.buildFConstant(S64, in legalizeFPTOI()
2286 K1 = B.buildFConstant(S64, in legalizeFPTOI()
2297 auto Hi = (Signed && SrcLT == S64) ? B.buildFPTOSI(S32, FloorMul) in legalizeFPTOI()
2303 Sign = B.buildMerge(S64, {Sign, Sign}); in legalizeFPTOI()
2305 B.buildSub(Dst, B.buildXor(S64, B.buildMerge(S64, {Lo, Hi}), Sign), Sign); in legalizeFPTOI()
2835 const LLT S64 = LLT::scalar(64); in legalizeFFloor() local
2839 assert(ST.hasFractBug() && MRI.getType(Dst) == S64 && in legalizeFFloor()
2850 auto Fract = B.buildIntrinsic(Intrinsic::amdgcn_fract, {S64}, false) in legalizeFFloor()
2861 auto Const = B.buildFConstant(S64, BitsToDouble(0x3fefffffffffffff)); in legalizeFFloor()
2863 Register Min = MRI.createGenericVirtualRegister(S64); in legalizeFFloor()
2876 CorrectedFract = B.buildSelect(S64, IsNan, ModSrc, Min, Flags).getReg(0); in legalizeFFloor()
2879 auto NegFract = B.buildFNeg(S64, CorrectedFract, Flags); in legalizeFFloor()
2926 const LLT S64 = LLT::scalar(64); in buildMultiply() local
2938 Zero64 = B.buildConstant(S64, 0).getReg(0); in buildMultiply()
3029 Tmp = B.buildAnyExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
3032 Tmp = B.buildMerge(S64, LocalAccum).getReg(0); in buildMultiply()
3035 Tmp = B.buildZExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
3046 auto Mad = B.buildInstr(AMDGPU::G_AMDGPU_MAD_U64_U32, {S64, S1}, in buildMultiply()
3430 LLT S64 = LLT::scalar(64); in legalizeFDIV() local
3436 if (DstTy == S64) in legalizeFDIV()
3534 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM64Impl() local
3540 auto Rcp = B.buildMerge(S64, {RcpLo, RcpHi}); in legalizeUnsignedDIV_REM64Impl()
3542 auto Zero64 = B.buildConstant(S64, 0); in legalizeUnsignedDIV_REM64Impl()
3543 auto NegDenom = B.buildSub(S64, Zero64, Denom); in legalizeUnsignedDIV_REM64Impl()
3545 auto MulLo1 = B.buildMul(S64, NegDenom, Rcp); in legalizeUnsignedDIV_REM64Impl()
3546 auto MulHi1 = B.buildUMulH(S64, Rcp, MulLo1); in legalizeUnsignedDIV_REM64Impl()
3554 auto Add1 = B.buildMerge(S64, {Add1_Lo, Add1_Hi}); in legalizeUnsignedDIV_REM64Impl()
3556 auto MulLo2 = B.buildMul(S64, NegDenom, Add1); in legalizeUnsignedDIV_REM64Impl()
3557 auto MulHi2 = B.buildUMulH(S64, Add1, MulLo2); in legalizeUnsignedDIV_REM64Impl()
3565 auto Add2 = B.buildMerge(S64, {Add2_Lo, Add2_Hi}); in legalizeUnsignedDIV_REM64Impl()
3571 auto MulHi3 = B.buildUMulH(S64, Numer, Add2); in legalizeUnsignedDIV_REM64Impl()
3572 auto Mul3 = B.buildMul(S64, Denom, MulHi3); in legalizeUnsignedDIV_REM64Impl()
3579 auto Sub1 = B.buildMerge(S64, {Sub1_Lo, Sub1_Hi}); in legalizeUnsignedDIV_REM64Impl()
3602 auto Sub2 = B.buildMerge(S64, {Sub2_Lo, Sub2_Hi}); in legalizeUnsignedDIV_REM64Impl()
3604 auto One64 = B.buildConstant(S64, 1); in legalizeUnsignedDIV_REM64Impl()
3605 auto Add3 = B.buildAdd(S64, MulHi3, One64); in legalizeUnsignedDIV_REM64Impl()
3615 auto Add4 = B.buildAdd(S64, Add3, One64); in legalizeUnsignedDIV_REM64Impl()
3620 auto Sub3 = B.buildMerge(S64, {Sub3_Lo, Sub3_Hi}); in legalizeUnsignedDIV_REM64Impl()
3627 S64, B.buildICmp(CmpInst::ICMP_NE, S1, C6, Zero32), Add4, Add3); in legalizeUnsignedDIV_REM64Impl()
3634 S64, B.buildICmp(CmpInst::ICMP_NE, S1, C6, Zero32), Sub3, Sub2); in legalizeUnsignedDIV_REM64Impl()
3662 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM() local
3671 else if (Ty == S64) in legalizeUnsignedDIV_REM()
3683 const LLT S64 = LLT::scalar(64); in legalizeSignedDIV_REM() local
3687 if (Ty != S32 && Ty != S64) in legalizeSignedDIV_REM()
3980 LLT S64 = LLT::scalar(64); in legalizeFDIV64() local
3983 auto One = B.buildFConstant(S64, 1.0); in legalizeFDIV64()
3985 auto DivScale0 = B.buildIntrinsic(Intrinsic::amdgcn_div_scale, {S64, S1}, false) in legalizeFDIV64()
3991 auto NegDivScale0 = B.buildFNeg(S64, DivScale0.getReg(0), Flags); in legalizeFDIV64()
3993 auto Rcp = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S64}, false) in legalizeFDIV64()
3997 auto Fma0 = B.buildFMA(S64, NegDivScale0, Rcp, One, Flags); in legalizeFDIV64()
3998 auto Fma1 = B.buildFMA(S64, Rcp, Fma0, Rcp, Flags); in legalizeFDIV64()
3999 auto Fma2 = B.buildFMA(S64, NegDivScale0, Fma1, One, Flags); in legalizeFDIV64()
4001 auto DivScale1 = B.buildIntrinsic(Intrinsic::amdgcn_div_scale, {S64, S1}, false) in legalizeFDIV64()
4007 auto Fma3 = B.buildFMA(S64, Fma1, Fma2, Fma1, Flags); in legalizeFDIV64()
4008 auto Mul = B.buildFMul(S64, DivScale1.getReg(0), Fma3, Flags); in legalizeFDIV64()
4009 auto Fma4 = B.buildFMA(S64, NegDivScale0, Mul, DivScale1.getReg(0), Flags); in legalizeFDIV64()
4032 auto Fmas = B.buildIntrinsic(Intrinsic::amdgcn_div_fmas, {S64}, false) in legalizeFDIV64()
5300 const LLT S64 = LLT::scalar(64); in legalizeTrapHsaQueuePtr() local
5331 Register Temp = B.buildLoad(S64, LoadAddr, *MMO).getReg(0); in legalizeTrapHsaQueuePtr()