| /llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 327 int Rot = getT2SOImmValRotateVal(Arg); in getT2SOImmVal() local
328 if (Rot != -1) in getT2SOImmVal()
329 return Rot; in getT2SOImmVal()
|
| H A D | ARMInstPrinter.cpp | 1375 unsigned Rot = (Op.getImm() & 0xF00) >> 7; in printModImmOperand() local
1389 int32_t Rotated = ARM_AM::rotr32(Bits, Rot); in printModImmOperand()
1403 << Rot << markup(">"); in printModImmOperand()
|
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1390 SDValue Rot = getInstr(Hexagon::V6_valignbi, dl, ByteTy, in compressHvxPred() local
1392 SDValue Vor = DAG.getNode(ISD::OR, dl, ByteTy, {Vrmpy, Rot}); in compressHvxPred()
2627 SDValue Rot = DAG.getNode(ISD::ADD, dl, ty(Rot0), {Rot0, Rot1}); in PerformHvxDAGCombine() local
2628 return DAG.getNode(HexagonISD::VROR, dl, ty(Op), {Vec, Rot}); in PerformHvxDAGCombine()
|
| /llvm-project-15.0.7/llvm/unittests/ADT/ |
| H A D | APIntTest.cpp | 1526 APInt Rot(256, "3fff80000000000000030000000000000000000040008000", 16); in TEST() local
1527 EXPECT_EQ(Rot, Big.rotr(144)); in TEST()
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 900 unsigned Rot; member
2625 Inst.addOperand(MCOperand::createImm(ModImm.Bits | (ModImm.Rot << 7))); in addModImmOperands()
3692 static std::unique_ptr<ARMOperand> CreateModImm(unsigned Bits, unsigned Rot, in CreateModImm() argument
3696 Op->ModImm.Rot = Rot; in CreateModImm()
4009 << ModImm.Rot << ")>"; in print()
|
| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 6558 auto *Rot = Builder.CreateOr(LShr, Shl); in ReduceSwitchRange() local
6559 SI->replaceUsesOfWith(SI->getCondition(), Rot); in ReduceSwitchRange()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7099 if (SDValue Rot = MatchRotate(N0, N1, SDLoc(N))) in visitOR() local
7100 return Rot; in visitOR()
7523 if (SDValue Rot = MatchRotate(LHS.getOperand(0), RHS.getOperand(0), DL)) { in MatchRotate() local
7524 return DAG.getNode(ISD::TRUNCATE, SDLoc(LHS), LHS.getValueType(), Rot); in MatchRotate()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 13354 SDValue Rot = DAG.getNode(ISD::OR, DL, RotateVT, SHL, SRL); in lowerShuffleAsBitRotate() local
13355 return DAG.getBitcast(VT, Rot); in lowerShuffleAsBitRotate()
13358 SDValue Rot = in lowerShuffleAsBitRotate() local
13361 return DAG.getBitcast(VT, Rot); in lowerShuffleAsBitRotate()
|