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Searched refs:Reserved (Results 1 – 25 of 132) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.cpp37 BitVector Reserved(getNumRegs()); in getReservedRegs() local
42 reserveRegisterTuples(Reserved, R600::ZERO); in getReservedRegs()
43 reserveRegisterTuples(Reserved, R600::HALF); in getReservedRegs()
44 reserveRegisterTuples(Reserved, R600::ONE); in getReservedRegs()
45 reserveRegisterTuples(Reserved, R600::ONE_INT); in getReservedRegs()
46 reserveRegisterTuples(Reserved, R600::NEG_HALF); in getReservedRegs()
47 reserveRegisterTuples(Reserved, R600::NEG_ONE); in getReservedRegs()
48 reserveRegisterTuples(Reserved, R600::PV_X); in getReservedRegs()
58 reserveRegisterTuples(Reserved, R); in getReservedRegs()
62 return Reserved; in getReservedRegs()
[all …]
H A DSIRegisterInfo.cpp386 Reserved.set(*R); in reserveRegisterTuples()
546 BitVector Reserved(getNumRegs()); in getReservedRegs() local
547 Reserved.set(AMDGPU::MODE); in getReservedRegs()
599 Reserved.set(AMDGPU::VCC); in getReservedRegs()
600 Reserved.set(AMDGPU::VCC_HI); in getReservedRegs()
609 reserveRegisterTuples(Reserved, Reg); in getReservedRegs()
617 Reserved.set(Low); in getReservedRegs()
690 reserveRegisterTuples(Reserved, Reg); in getReservedRegs()
695 reserveRegisterTuples(Reserved, Reg); in getReservedRegs()
705 reserveRegisterTuples(Reserved, Reg); in getReservedRegs()
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/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.cpp163 Reserved.set(R); in getReservedRegs()
173 Reserved.set(R); in getReservedRegs()
177 Reserved.set(Mips::GP); in getReservedRegs()
184 Reserved.set(Reg); in getReservedRegs()
188 Reserved.set(Reg); in getReservedRegs()
220 Reserved.set(Reg); in getReservedRegs()
225 Reserved.set(Mips::RA); in getReservedRegs()
227 Reserved.set(Mips::T0); in getReservedRegs()
228 Reserved.set(Mips::T1); in getReservedRegs()
235 Reserved.set(Mips::GP); in getReservedRegs()
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/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp150 Reserved.set(Hexagon::R29); in getReservedRegs()
151 Reserved.set(Hexagon::R30); in getReservedRegs()
152 Reserved.set(Hexagon::R31); in getReservedRegs()
153 Reserved.set(Hexagon::VTMP); in getReservedRegs()
184 Reserved.set(Hexagon::C8); in getReservedRegs()
185 Reserved.set(Hexagon::USR_OVF); in getReservedRegs()
192 Reserved.set(Reg); in getReservedRegs()
195 Reserved.set(Hexagon::R19); in getReservedRegs()
197 for (int x = Reserved.find_first(); x >= 0; x = Reserved.find_next(x)) in getReservedRegs()
198 markSuperRegs(Reserved, x); in getReservedRegs()
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H A DHexagonBlockRanges.cpp222 Reserved(TRI.getReservedRegs(mf)) { in HexagonBlockRanges()
228 Reserved[R] = true; in HexagonBlockRanges()
252 if (!Reserved[R.Reg]) in getLiveIns()
255 if (!Reserved[S.Reg]) in getLiveIns()
324 if (Register::isPhysicalRegister(R.Reg) && Reserved[R.Reg]) in computeInitialLiveRanges()
341 if (Register::isPhysicalRegister(S.Reg) && Reserved[S.Reg]) in computeInitialLiveRanges()
360 if (Reserved[PR]) in computeInitialLiveRanges()
478 if (Reserved[S.Reg] || Visited[S.Reg]) in computeDeadMap()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.cpp58 Reserved.set(SP::G1); in getReservedRegs()
62 Reserved.set(SP::G2); in getReservedRegs()
63 Reserved.set(SP::G3); in getReservedRegs()
64 Reserved.set(SP::G4); in getReservedRegs()
70 Reserved.set(SP::O6); in getReservedRegs()
71 Reserved.set(SP::I6); in getReservedRegs()
72 Reserved.set(SP::I7); in getReservedRegs()
73 Reserved.set(SP::G0); in getReservedRegs()
74 Reserved.set(SP::G6); in getReservedRegs()
75 Reserved.set(SP::G7); in getReservedRegs()
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/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.cpp45 Reserved.set(Lanai::R0); in getReservedRegs()
46 Reserved.set(Lanai::R1); in getReservedRegs()
47 Reserved.set(Lanai::PC); in getReservedRegs()
48 Reserved.set(Lanai::R2); in getReservedRegs()
49 Reserved.set(Lanai::SP); in getReservedRegs()
50 Reserved.set(Lanai::R4); in getReservedRegs()
51 Reserved.set(Lanai::FP); in getReservedRegs()
52 Reserved.set(Lanai::R5); in getReservedRegs()
53 Reserved.set(Lanai::RR1); in getReservedRegs()
54 Reserved.set(Lanai::R10); in getReservedRegs()
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/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp78 Reserved.set(MSP430::PCB); in getReservedRegs()
79 Reserved.set(MSP430::SPB); in getReservedRegs()
80 Reserved.set(MSP430::SRB); in getReservedRegs()
81 Reserved.set(MSP430::CGB); in getReservedRegs()
82 Reserved.set(MSP430::PC); in getReservedRegs()
83 Reserved.set(MSP430::SP); in getReservedRegs()
84 Reserved.set(MSP430::SR); in getReservedRegs()
85 Reserved.set(MSP430::CG); in getReservedRegs()
89 Reserved.set(MSP430::R4B); in getReservedRegs()
90 Reserved.set(MSP430::R4); in getReservedRegs()
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/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.cpp81 BitVector Reserved(getNumRegs()); in getReservedRegs() local
84 markSuperRegs(Reserved, LoongArch::R0); // zero in getReservedRegs()
85 markSuperRegs(Reserved, LoongArch::R2); // tp in getReservedRegs()
86 markSuperRegs(Reserved, LoongArch::R3); // sp in getReservedRegs()
87 markSuperRegs(Reserved, LoongArch::R21); // non-allocatable in getReservedRegs()
89 markSuperRegs(Reserved, LoongArch::R22); // fp in getReservedRegs()
93 markSuperRegs(Reserved, LoongArchABI::getBPReg()); // bp in getReservedRegs()
95 assert(checkAllSuperRegsMarked(Reserved)); in getReservedRegs()
96 return Reserved; in getReservedRegs()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMScheduleA9.td460 InstrStage<2, [A9_DRegsN], 0, Reserved>,
469 InstrStage<3, [A9_DRegsN], 0, Reserved>,
478 InstrStage<3, [A9_DRegsN], 0, Reserved>,
488 InstrStage<5, [A9_DRegsN], 0, Reserved>,
497 InstrStage<5, [A9_DRegsN], 0, Reserved>,
505 InstrStage<5, [A9_DRegsN], 0, Reserved>,
513 InstrStage<5, [A9_DRegsN], 0, Reserved>,
522 InstrStage<5, [A9_DRegsN], 0, Reserved>,
530 InstrStage<3, [A9_DRegsN], 0, Reserved>,
954 InstrStage<9,[A9_DRegsVFP], 0, Reserved>,
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H A DARMBaseRegisterInfo.cpp205 BitVector Reserved(getNumRegs()); in getReservedRegs() local
206 markSuperRegs(Reserved, ARM::SP); in getReservedRegs()
207 markSuperRegs(Reserved, ARM::PC); in getReservedRegs()
213 markSuperRegs(Reserved, BasePtr); in getReservedRegs()
216 markSuperRegs(Reserved, ARM::R9); in getReservedRegs()
226 if (Reserved.test(*SI)) in getReservedRegs()
229 markSuperRegs(Reserved, ARM::ZR); in getReservedRegs()
232 return Reserved; in getReservedRegs()
245 BitVector Reserved(getNumRegs()); in isInlineAsmReadOnlyReg() local
246 markSuperRegs(Reserved, ARM::PC); in isInlineAsmReadOnlyReg()
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/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.cpp48 BitVector Reserved(getNumRegs()); in getReservedRegs() local
53 markSuperRegs(Reserved, CSKY::R7); // bp in getReservedRegs()
63 markSuperRegs(Reserved, CSKY::R14); // sp in getReservedRegs()
64 markSuperRegs(Reserved, CSKY::R15); // lr in getReservedRegs()
71 markSuperRegs(Reserved, CSKY::R26); in getReservedRegs()
72 markSuperRegs(Reserved, CSKY::R27); in getReservedRegs()
73 markSuperRegs(Reserved, CSKY::R28); // gp in getReservedRegs()
74 markSuperRegs(Reserved, CSKY::R29); in getReservedRegs()
75 markSuperRegs(Reserved, CSKY::R30); in getReservedRegs()
76 markSuperRegs(Reserved, CSKY::R31); // tp in getReservedRegs()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.cpp109 BitVector Reserved(getNumRegs()); in getReservedRegs() local
111 markSuperRegs(Reserved, Reg); in getReservedRegs()
113 markSuperRegs(Reserved, NVPTX::VRFrame32); in getReservedRegs()
114 markSuperRegs(Reserved, NVPTX::VRFrameLocal32); in getReservedRegs()
115 markSuperRegs(Reserved, NVPTX::VRFrame64); in getReservedRegs()
116 markSuperRegs(Reserved, NVPTX::VRFrameLocal64); in getReservedRegs()
117 markSuperRegs(Reserved, NVPTX::VRDepot); in getReservedRegs()
118 return Reserved; in getReservedRegs()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp80 BitVector Reserved(getNumRegs()); in getReservedRegs() local
85 markSuperRegs(Reserved, Reg); in getReservedRegs()
90 markSuperRegs(Reserved, RISCV::X2); // sp in getReservedRegs()
91 markSuperRegs(Reserved, RISCV::X3); // gp in getReservedRegs()
101 markSuperRegs(Reserved, RISCV::VL); in getReservedRegs()
102 markSuperRegs(Reserved, RISCV::VTYPE); in getReservedRegs()
103 markSuperRegs(Reserved, RISCV::VXSAT); in getReservedRegs()
104 markSuperRegs(Reserved, RISCV::VXRM); in getReservedRegs()
108 markSuperRegs(Reserved, RISCV::FRM); in getReservedRegs()
109 markSuperRegs(Reserved, RISCV::FFLAGS); in getReservedRegs()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.cpp61 Reserved.set(AVR::R0); in getReservedRegs()
62 Reserved.set(AVR::R1); in getReservedRegs()
63 Reserved.set(AVR::R1R0); in getReservedRegs()
66 Reserved.set(AVR::SPL); in getReservedRegs()
67 Reserved.set(AVR::SPH); in getReservedRegs()
68 Reserved.set(AVR::SP); in getReservedRegs()
74 Reserved.set(Reg); in getReservedRegs()
77 Reserved.set(Reg); in getReservedRegs()
89 Reserved.set(AVR::R28); in getReservedRegs()
90 Reserved.set(AVR::R29); in getReservedRegs()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp536 Reserved.set(X86::FPCW); in getReservedRegs()
546 Reserved.set(SubReg); in getReservedRegs()
549 Reserved.set(X86::SSP); in getReservedRegs()
553 Reserved.set(SubReg); in getReservedRegs()
576 Reserved.set(X86::CS); in getReservedRegs()
577 Reserved.set(X86::SS); in getReservedRegs()
578 Reserved.set(X86::DS); in getReservedRegs()
579 Reserved.set(X86::ES); in getReservedRegs()
580 Reserved.set(X86::FS); in getReservedRegs()
581 Reserved.set(X86::GS); in getReservedRegs()
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/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCRegisterInfo.cpp141 BitVector Reserved(getNumRegs()); in getReservedRegs() local
143 Reserved.set(ARC::ILINK); in getReservedRegs()
144 Reserved.set(ARC::SP); in getReservedRegs()
145 Reserved.set(ARC::GP); in getReservedRegs()
146 Reserved.set(ARC::R25); in getReservedRegs()
147 Reserved.set(ARC::BLINK); in getReservedRegs()
148 Reserved.set(ARC::FP); in getReservedRegs()
150 return Reserved; in getReservedRegs()
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dinline-asm-reserved-regs.ll4 ; ERR: note: Reserved registers on the clobber list may not be preserved across the asm statement, …
12 ; ERR: note: Reserved registers on the clobber list may not be preserved across the asm statement, …
20 ; ERR: note: Reserved registers on the clobber list may not be preserved across the asm statement, …
28 ; ERR: note: Reserved registers on the clobber list may not be preserved across the asm statement, …
36 ; ERR: note: Reserved registers on the clobber list may not be preserved across the asm statement, …
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.cpp38 BitVector Reserved(getNumRegs()); in getReservedRegs() local
39 markSuperRegs(Reserved, BPF::W10); // [W|R]10 is read only frame pointer in getReservedRegs()
40 markSuperRegs(Reserved, BPF::W11); // [W|R]11 is pseudo stack pointer in getReservedRegs()
41 return Reserved; in getReservedRegs()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp125 BitVector Reserved(getNumRegs()); in getReservedRegs() local
128 auto setBitVector = [&Reserved, this](unsigned Reg) { in getReservedRegs()
130 Reserved.set(*I); in getReservedRegs()
133 Reserved.set(*I); in getReservedRegs()
162 return Reserved; in getReservedRegs()
/llvm-project-15.0.7/llvm/test/tools/llvm-readobj/COFF/
H A Dresources.test35 ZERO-NEXT: Reserved: 0
69 TEST_RES-NEXT: Reserved: 0
89 TEST_RES-NEXT: Reserved: 0
114 TEST_RES-NEXT: Reserved: 0
134 TEST_RES-NEXT: Reserved: 0
159 TEST_RES-NEXT: Reserved: 0
184 TEST_RES-NEXT: Reserved: 0
204 TEST_RES-NEXT: Reserved: 0
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp230 BitVector Reserved(getNumRegs()); in getReservedRegs() local
233 Reserved.set(XCore::CP); in getReservedRegs()
234 Reserved.set(XCore::DP); in getReservedRegs()
235 Reserved.set(XCore::SP); in getReservedRegs()
236 Reserved.set(XCore::LR); in getReservedRegs()
238 Reserved.set(XCore::R10); in getReservedRegs()
240 return Reserved; in getReservedRegs()
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DBenchmarkRunner.cpp70 int Reserved = 0; in runAndSample() local
83 if (Reserved == 0) { in runAndSample()
84 Reserved = Counter->numValues(); in runAndSample()
85 CounterValues.reserve(Reserved); in runAndSample()
86 } else if (Reserved != Counter->numValues()) in runAndSample()
93 .concat(std::to_string(Reserved))); in runAndSample()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp88 if (Reserved.size() != RR.size() || RR != Reserved) { in runOnMachineFunction()
90 Reserved = RR; in runOnMachineFunction()
127 if (Reserved.test(PhysReg)) in compute()
/llvm-project-15.0.7/llvm/test/tools/yaml2obj/XCOFF/
H A Daux-hdr-defaults.yaml30 # CASE1-NEXT: (Reserved): 0x0
33 # CASE1-NEXT: Reserved for debugger: 0x0
89 # CASE2-NEXT: Reserved for debugger: 0x0
103 # CASE2-NEXT: (Reserved): 0x0
145 # CASE3-NEXT: (Reserved): 0x0
148 # CASE3-NEXT: Reserved for debugger: 0x0
170 # CASE4-NEXT: Reserved for debugger: 0x0
184 # CASE4-NEXT: (Reserved): 0x0

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