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Searched refs:RegNum (Results 1 – 25 of 52) sorted by relevance

123

/llvm-project-15.0.7/compiler-rt/lib/xray/
H A Dxray_mips64.cpp34 enum RegNum : uint32_t { enum
105 RegNum::RN_RA, 0x8); in patchSled()
107 RegNum::RN_T9, 0x0); in patchSled()
113 RegNum::RN_T9, RegNum::RN_T9, 0x10); in patchSled()
117 RegNum::RN_T9, RegNum::RN_T9, 0x10); in patchSled()
123 0x0, RegNum::RN_RA, 0X0); in patchSled()
125 RegNum::RN_T0, LoFunctionID); in patchSled()
127 RegNum::RN_T9, 0x0); in patchSled()
129 RegNum::RN_RA, 0x8); in patchSled()
131 RegNum::RN_SP, 0x10); in patchSled()
[all …]
H A Dxray_mips.cpp33 enum RegNum : uint32_t { enum
104 Address[2] = encodeInstruction(PatchOpcodes::PO_SW, RegNum::RN_SP, in patchSled()
105 RegNum::RN_RA, 0x4); in patchSled()
107 RegNum::RN_T9, 0x0); in patchSled()
111 RegNum::RN_T9, LoTracingHookAddr); in patchSled()
115 0x0, RegNum::RN_RA, 0X0); in patchSled()
117 RegNum::RN_T0, LoFunctionID); in patchSled()
119 RegNum::RN_T9, 0x0); in patchSled()
121 RegNum::RN_RA, 0x4); in patchSled()
123 RegNum::RN_SP, 0x8); in patchSled()
[all …]
H A Dxray_hexagon.cpp37 enum RegNum : uint32_t { enum
43 encodeExtendedTransferImmediate(uint32_t Imm, RegNum DestReg, in encodeExtendedTransferImmediate()
/llvm-project-15.0.7/llvm/lib/MC/
H A DMCRegisterInfo.cpp68 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum() argument
74 DwarfLLVMRegPair Key = { RegNum, 0 }; in getDwarfRegNum()
76 if (I == M+Size || I->FromReg != RegNum) in getDwarfRegNum()
81 Optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, in getLLVMRegNum() argument
88 DwarfLLVMRegPair Key = { RegNum, 0 }; in getLLVMRegNum()
90 if (I != M + Size && I->FromReg == RegNum) in getLLVMRegNum()
104 if (Optional<unsigned> LRegNum = getLLVMRegNum(RegNum, true)) in getDwarfRegNumFromDwarfEHRegNum()
106 return RegNum; in getDwarfRegNumFromDwarfEHRegNum()
109 int MCRegisterInfo::getSEHRegNum(MCRegister RegNum) const { in getSEHRegNum()
111 if (I == L2SEHRegs.end()) return (int)RegNum; in getSEHRegNum()
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/llvm-project-15.0.7/llvm/lib/DebugInfo/DWARF/
H A DDWARFDebugFrame.cpp143 return RegNum == RHS.RegNum && Offset == RHS.Offset && in operator ==()
571 if (!RegNum) in parseRows()
585 if (!RegNum) in parseRows()
646 for (uint32_t RegNum = 16; RegNum < 32; ++RegNum) { in parseRows() local
665 if (!RegNum) in parseRows()
674 if (!RegNum) in parseRows()
686 if (!RegNum) in parseRows()
699 if (!RegNum) in parseRows()
711 if (!RegNum) in parseRows()
720 if (!RegNum) in parseRows()
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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.cpp42 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
48 if (RegNum != NumArgRegs && RegNum % 2 == 1) { in CC_PPC32_SVR4_Custom_AlignArgRegs()
49 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignArgRegs()
67 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
68 int RegsLeft = NumArgRegs - RegNum; in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
72 if (RegNum != NumArgRegs && RegsLeft < 4) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
74 State.AllocateReg(ArgRegs[RegNum + i]); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
93 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
97 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
98 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
/llvm-project-15.0.7/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp351 int RegNum = matchFn(Name); in parseRegisterName() local
357 if (RegNum == AVR::NoRegister) { in parseRegisterName()
360 if (RegNum == AVR::NoRegister) { in parseRegisterName()
364 return RegNum; in parseRegisterName()
370 if (RegNum == AVR::NoRegister) in parseRegisterName()
373 return RegNum; in parseRegisterName()
377 int RegNum = AVR::NoRegister; in parseRegister() local
399 return RegNum; in parseRegister()
742 if (0 <= RegNum && RegNum <= 15 && in validateTargetOperandClass()
747 RegName << "r" << RegNum; in validateTargetOperandClass()
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/llvm-project-15.0.7/llvm/include/llvm/DebugInfo/DWARF/
H A DDWARFDebugFrame.h68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
80 : Kind(K), RegNum(InvalidRegisterNumber), Offset(0), AddrSpace(None), in UnwindLocation()
85 : Kind(K), RegNum(Reg), Offset(Off), AddrSpace(AS), Dereference(Deref) {} in UnwindLocation()
88 : Kind(DWARFExpr), RegNum(InvalidRegisterNumber), Offset(0), Expr(E), in UnwindLocation()
132 uint32_t getRegister() const { return RegNum; } in getRegister()
142 void setRegister(uint32_t NewRegNum) { RegNum = NewRegNum; } in setRegister()
190 Optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation() argument
191 auto Pos = Locations.find(RegNum); in getRegisterLocation()
203 Locations.erase(RegNum); in setRegisterLocation()
204 Locations.insert(std::make_pair(RegNum, Location)); in setRegisterLocation()
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/llvm-project-15.0.7/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRInstPrinter.cpp89 const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum, in getPrettyRegisterName() argument
94 unsigned RegLoNum = MRI.getSubReg(RegNum, AVR::sub_lo); in getPrettyRegisterName()
95 RegNum = (RegLoNum != AVR::NoRegister) ? RegLoNum : RegNum; in getPrettyRegisterName()
98 return getRegisterName(RegNum); in getPrettyRegisterName()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp201 unsigned RegNum; member
243 return Reg.RegNum; in getReg()
424 Op->Reg.RegNum = RegNum; in CreateReg()
1772 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1777 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1789 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1794 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1806 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1811 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1826 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/MSP430/AsmParser/
H A DMSP430AsmParser.cpp200 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg() argument
202 return std::make_unique<MSP430Operand>(k_Reg, RegNum, S, E); in CreateReg()
210 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, in CreateMem() argument
213 return std::make_unique<MSP430Operand>(RegNum, Val, S, E); in CreateMem()
216 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, in CreateIndReg() argument
218 return std::make_unique<MSP430Operand>(k_IndReg, RegNum, S, E); in CreateIndReg()
221 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, in CreatePostIndReg() argument
223 return std::make_unique<MSP430Operand>(k_PostIndReg, RegNum, S, E); in CreatePostIndReg()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp123 unsigned RegNum; member
158 return Reg.RegNum; in getReg()
597 Op->Reg.RegNum = RegNum; in createReg()
698 unsigned RegNum; in parseRegister() local
705 RegNum = MatchRegisterName(Lexer.getTok().getIdentifier()); in parseRegister()
706 if (RegNum == 0) { in parseRegister()
712 return LanaiOperand::createReg(RegNum, Start, End); in parseRegister()
719 bool LanaiAsmParser::ParseRegister(unsigned &RegNum, SMLoc &StartLoc, in ParseRegister() argument
726 RegNum = Op->getReg(); in ParseRegister()
730 OperandMatchResultTy LanaiAsmParser::tryParseRegister(unsigned &RegNum, in tryParseRegister() argument
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp361 unsigned RegNum; member
1986 Op->Reg.RegNum = RegNum; in CreateReg()
2018 Op->VectorList.RegNum = RegNum; in CreateVectorList()
2199 Op->MatrixReg.RegNum = RegNum; in CreateMatrixRegister()
2644 if (!RegNum) { in matchRegisterNameAlias()
2665 return RegNum; in matchRegisterNameAlias()
2682 RegNum = Reg; in tryParseScalarRegister()
3697 if (RegNum) { in tryParseVectorRegister()
3707 Reg = RegNum; in tryParseVectorRegister()
3874 if (!RegNum) in tryParseMatrixTileList()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kMCCodeEmitter.cpp199 unsigned RegNum = Op.getReg(); in getMachineOpValue() local
201 Value |= RI->getEncodingValue(RegNum); in getMachineOpValue()
203 if (M68kII::isAddressRegister(RegNum)) in getMachineOpValue()
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dstackmap-large-constants.ll44 ; Dwarf RegNum
79 ; Dwarf RegNum
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCRegisterInfo.h513 int getDwarfRegNum(MCRegister RegNum, bool isEH) const;
517 Optional<unsigned> getLLVMRegNum(unsigned RegNum, bool isEH) const;
521 int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const;
525 int getSEHRegNum(MCRegister RegNum) const;
529 int getCodeViewRegNum(MCRegister RegNum) const;
/llvm-project-15.0.7/llvm/lib/Target/VE/AsmParser/
H A DVEAsmParser.cpp176 unsigned RegNum; member
349 return Reg.RegNum; in getReg()
602 Op->Reg.RegNum = RegNum; in CreateReg()
650 Op.Reg.RegNum = I32Regs[regIdx]; in MorphToI32Reg()
659 Op.Reg.RegNum = F32Regs[regIdx]; in MorphToF32Reg()
668 Op.Reg.RegNum = F128Regs[regIdx / 2]; in MorphToF128Reg()
689 Op.Reg.RegNum = MISCRegs[regIdx]; in MorphToMISCReg()
811 int RegNum = matchFn(Name); in parseRegisterName() local
815 if (RegNum == VE::NoRegister) { in parseRegisterName()
816 RegNum = matchFn(Name.lower()); in parseRegisterName()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DInstructionSelectorImpl.h923 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
925 OutMIs[InsnID].addDef(RegNum, RegState::Implicit); in executeMatchTable()
928 << InsnID << "], " << RegNum << ")\n"); in executeMatchTable()
934 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
936 OutMIs[InsnID].addUse(RegNum, RegState::Implicit); in executeMatchTable()
939 << InsnID << "], " << RegNum << ")\n"); in executeMatchTable()
945 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
948 OutMIs[InsnID].addReg(RegNum, RegFlags); in executeMatchTable()
952 << InsnID << "], " << RegNum << ", " << RegFlags << ")\n"); in executeMatchTable()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/AsmParser/
H A DLoongArchAsmParser.cpp100 MCRegister RegNum; member
121 void setReg(MCRegister PhysReg) { Reg.RegNum = PhysReg; } in setReg()
174 return Reg.RegNum.id(); in getReg()
219 Op->Reg.RegNum = RegNo; in createReg()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.h47 int getDwarfRegNum(unsigned RegNum, bool IsEH) const;
/llvm-project-15.0.7/llvm/lib/Target/CSKY/AsmParser/
H A DCSKYAsmParser.cpp155 unsigned RegNum; member
403 return Reg.RegNum; in getReg()
482 Op->Reg.RegNum = RegNo; in createReg()
630 return Reg.RegNum == Other.Reg.RegNum; in isValidForTie()
1724 Op.Reg.RegNum = convertFPR32ToFPR64(Reg); in validateTargetOperandClass()
1726 (Op.Reg.RegNum < CSKY::F0_64 || Op.Reg.RegNum > CSKY::F15_64)) in validateTargetOperandClass()
1729 (Op.Reg.RegNum < CSKY::F0_64 || Op.Reg.RegNum > CSKY::F31_64)) in validateTargetOperandClass()
1737 Op.Reg.RegNum = MRI->getEncodingValue(Reg) + CSKY::R0_R1; in validateTargetOperandClass()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DStackMaps.cpp179 int RegNum = TRI->getDwarfRegNum(Reg, false); in getDwarfRegNum() local
180 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNum < 0; ++SR) in getDwarfRegNum()
181 RegNum = TRI->getDwarfRegNum(*SR, false); in getDwarfRegNum()
183 assert(RegNum >= 0 && "Invalid Dwarf register number."); in getDwarfRegNum()
184 return (unsigned)RegNum; in getDwarfRegNum()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp246 unsigned RegNum; member
333 return Reg.RegNum; in getReg()
452 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind, in CreateReg() argument
455 Op->Reg.RegNum = RegNum; in CreateReg()
485 Op.Reg.RegNum = IntPairRegs[regIdx / 2]; in MorphToIntPairReg()
496 Op.Reg.RegNum = DoubleRegs[regIdx / 2]; in MorphToDoubleReg()
519 Op.Reg.RegNum = Reg; in MorphToQuadReg()
532 Op.Reg.RegNum = CoprocPairRegs[regIdx / 2]; in MorphToCoprocPairReg()
/llvm-project-15.0.7/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp91 unsigned RegNum; member
151 return Reg.RegNum; in getReg()
210 Op->Reg.RegNum = RegNo; in createReg()
/llvm-project-15.0.7/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp291 auto DecodeRegisterOrImm = [&Inst, Address, Decoder](Field RegNum, in DecodeMoveHRegInstruction()
293 if (30 == RegNum) { in DecodeMoveHRegInstruction()
298 return DecodeGPR32RegisterClass(Inst, RegNum, Address, Decoder); in DecodeMoveHRegInstruction()

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