| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 905 SDValue PtrOff = DAG.getIntPtrConstant(64, dl); in LowerCall_32() local 906 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32() 925 SDValue PtrOff = DAG.getIntPtrConstant(Offset, dl); in LowerCall_32() local 926 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32() 960 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32() 968 SDValue PtrOff = DAG.getIntPtrConstant(Offset, dl); in LowerCall_32() local 969 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32() 973 PtrOff = DAG.getIntPtrConstant(Offset + 4, dl); in LowerCall_32() 974 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32() 999 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 4223 FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); in LowerFormalArguments_32SVR4() 4243 FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); in LowerFormalArguments_32SVR4() 4635 FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); in LowerFormalArguments_64SVR4() 5870 Arg = PtrOff; in LowerCall_32SVR4() 6167 SDValue PtrOff; in LowerCall_64SVR4() local 6180 PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff); in LowerCall_64SVR4() 6411 PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, ConstFour); in LowerCall_64SVR4() 7205 FIN = DAG.getNode(ISD::ADD, dl, PtrOff.getValueType(), FIN, PtrOff); in LowerFormalArguments_AIX() 7402 SDValue PtrOff = in LowerCall_AIX() local 7404 PtrOff = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff); in LowerCall_AIX() [all …]
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| H A D | PPCISelLowering.h | 1368 SDValue createMemcpyOutsideCallSeq(SDValue Arg, SDValue PtrOff,
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 332 SDValue PtrOff = DAG.getNode( in LowerCall() local 336 DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo()); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 858 SDValue PtrOff = in LowerCCCCallTo() local 868 Chain, dl, PtrOff, Arg, SizeNode, Flags.getNonZeroByValAlign(), in LowerCCCCallTo() 873 MemOp = DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo()); in LowerCCCCallTo()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 455 SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset, DL); in LowerMemOpCallTo() local 456 PtrOff = DAG.getNode(ISD::ADD, DL, getPointerTy(DAG.getDataLayout()), in LowerMemOpCallTo() 457 StackPtr, PtrOff); in LowerMemOpCallTo() 459 return CreateCopyOfByValArgument(Arg, PtrOff, Chain, Flags, DAG, DL); in LowerMemOpCallTo() 462 Chain, DL, Arg, PtrOff, in LowerMemOpCallTo()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 724 SDValue PtrOff = in LowerCall() local 726 PtrOff = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, PtrOff); in LowerCall() 728 DAG.getStore(Chain, DL, Arg, PtrOff, MachinePointerInfo())); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 397 SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); in LowerFormalArguments() local 398 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, in LowerFormalArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 699 SDValue PtrOff = in LowerCCCCallTo() local 704 DAG.getStore(Chain, DL, Arg, PtrOff, MachinePointerInfo())); in LowerCCCCallTo()
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1419 SDValue PtrOff = DAG.getNode( in LowerCall() local 1425 DAG.getStore(Chain, DL, Arg, PtrOff, in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9760 uint64_t PtrOff = in visitFunnelShift() local 9762 Align NewAlign = commonAlignment(RHS->getAlign(), PtrOff); in visitFunnelShift() 9769 RHS->getBasePtr(), TypeSize::Fixed(PtrOff), DL); in visitFunnelShift() 12917 uint64_t PtrOff = PtrAdjustmentInBits / 8; in reduceLoadWidth() local 12918 Align NewAlign = commonAlignment(LN0->getAlign(), PtrOff); in reduceLoadWidth() 17686 uint64_t PtrOff = ShAmt / 8; in ReduceLoadOpStoreWidth() local 17690 PtrOff = (BitWidth + 7 - NewBW) / 8 - PtrOff; in ReduceLoadOpStoreWidth() 17693 Align NewAlign = commonAlignment(LD->getAlign(), PtrOff); in ReduceLoadOpStoreWidth() 19672 unsigned PtrOff = VecEltVT.getSizeInBits() * Elt / 8; in scalarizeExtractedVectorLoad() local 19673 MPI = OriginalLoad->getPointerInfo().getWithOffset(PtrOff); in scalarizeExtractedVectorLoad() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3024 SDValue PtrOff = in passArgOnStack() local 3027 return DAG.getStore(Chain, DL, Arg, PtrOff, MachinePointerInfo()); in passArgOnStack() 4533 SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); in writeVarArgRegs() local 4535 DAG.getStore(Chain, DL, ArgValue, PtrOff, MachinePointerInfo()); in writeVarArgRegs()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6783 SDValue PtrOff = DAG.getIntPtrConstant(Offset, DL); in LowerCall() local 6784 PtrOff = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, PtrOff); in LowerCall() 6798 SDValue PtrOff = DAG.getIntPtrConstant(Offset, DL); in LowerCall() local 6800 DstAddr = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, PtrOff); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11054 SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); in LowerFormalArguments() local 11055 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, in LowerFormalArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3209 SDValue PtrOff = DAG.getConstant(Offset, DL, PtrVT); in LowerCall() local 3241 DstAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, SP, PtrOff); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4263 SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset, dl); in LowerMemOpCallTo() local 4264 PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(DAG.getDataLayout()), in LowerMemOpCallTo() 4265 StackPtr, PtrOff); in LowerMemOpCallTo() 4267 return CreateCopyOfByValArgument(Arg, PtrOff, Chain, Flags, DAG, dl); in LowerMemOpCallTo() 4274 Chain, dl, Arg, PtrOff, in LowerMemOpCallTo() 44047 unsigned PtrOff = VT.getSizeInBits() * CIdx->getZExtValue() / 8; in combineExtractVectorElt() local 44048 MachinePointerInfo MPI = LoadVec->getPointerInfo().getWithOffset(PtrOff); in combineExtractVectorElt() 44049 Align Alignment = commonAlignment(LoadVec->getAlign(), PtrOff); in combineExtractVectorElt()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2272 SDValue PtrOff = DAG.getIntPtrConstant(Offset, dl); in computeAddrForCallArg() local 2274 StackPtr, PtrOff); in computeAddrForCallArg()
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