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Searched refs:PredEdge (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNILPSched.cpp276 for (const auto &PredEdge : SU->Preds) { in releasePredecessors() local
277 auto PredSU = PredEdge.getSUnit(); in releasePredecessors()
278 if (PredEdge.isWeak()) in releasePredecessors()
282 PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge.getLatency()); in releasePredecessors()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp95 void ReleasePred(SUnit *SU, SDep *PredEdge);
135 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred() argument
136 SUnit *PredSU = PredEdge->getSUnit(); in ReleasePred()
H A DScheduleDAGRRList.cpp252 void ReleasePred(SUnit *SU, const SDep *PredEdge);
259 void CapturePred(SDep *PredEdge);
398 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) { in ReleasePred() argument
399 SUnit *PredSU = PredEdge->getSUnit(); in ReleasePred()
414 PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge->getLatency()); in ReleasePred()
820 void ScheduleDAGRRList::CapturePred(SDep *PredEdge) { in CapturePred() argument
821 SUnit *PredSU = PredEdge->getSUnit(); in CapturePred()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineScheduler.cpp675 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred() argument
676 SUnit *PredSU = PredEdge->getSUnit(); in releasePred()
678 if (PredEdge->isWeak()) { in releasePred()
680 if (PredEdge->isCluster()) in releasePred()
694 if (PredSU->BotReadyCycle < SU->BotReadyCycle + PredEdge->getLatency()) in releasePred()
695 PredSU->BotReadyCycle = SU->BotReadyCycle + PredEdge->getLatency(); in releasePred()
H A DMachinePipeliner.cpp2843 for (SDep &PredEdge : SU->Preds) { in checkValidNodeOrder()
2844 SUnit *PredSU = PredEdge.getSUnit(); in checkValidNodeOrder()
/llvm-project-15.0.7/bolt/runtime/
H A Dinstr.cpp1189 const uint32_t PredEdge = CFGNodes[Cur].InEdges[I].ID; in computeEdgeFrequencies() local
1190 ParentEdgeFreq -= EdgeFreqs[PredEdge]; in computeEdgeFrequencies()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h386 void releasePred(SUnit *SU, SDep *PredEdge);