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Searched refs:OutIdx (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1559 for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) in SimplifyDemandedVectorElts() local
1560 if (DemandedElts[OutIdx]) in SimplifyDemandedVectorElts()
1561 InputDemandedElts.setBit(OutIdx / Ratio); in SimplifyDemandedVectorElts()
1583 for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) in SimplifyDemandedVectorElts() local
1584 if (UndefElts2[OutIdx / Ratio]) in SimplifyDemandedVectorElts()
1585 UndefElts.setBit(OutIdx); in SimplifyDemandedVectorElts()
1590 for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) { in SimplifyDemandedVectorElts() local
1591 APInt SubUndef = UndefElts2.lshr(OutIdx * Ratio).zextOrTrunc(Ratio); in SimplifyDemandedVectorElts()
1593 UndefElts.setBit(OutIdx); in SimplifyDemandedVectorElts()
/llvm-project-15.0.7/llvm/lib/ObjectYAML/
H A DMachOYAML.cpp63 size_t OutIdx = 0; in input() local
65 if (Scalar[Idx] == '-' || OutIdx >= 16) in input()
72 Val[OutIdx] = static_cast<uint8_t>(TempInt); in input()
74 ++OutIdx; in input()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp3268 for (unsigned i = 0, e = ArgLocs.size(), OutIdx = 0; i != e; ++i, ++OutIdx) { in LowerCall() local
3269 SDValue Arg = OutVals[OutIdx]; in LowerCall()
3272 ISD::ArgFlagsTy Flags = Outs[OutIdx].Flags; in LowerCall()
3345 unsigned ValSizeInBits = Outs[OutIdx].ArgVT.getSizeInBits(); in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp996 int OutIdx = InvMap[M >> Shift]; in packSegmentMask() local
997 M = (M & (SegLen-1)) + SegLen*OutIdx; in packSegmentMask()