| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 56 static void applyStackPassedSmallTypeDAGHack(EVT OrigVT, MVT &ValVT, in applyStackPassedSmallTypeDAGHack() argument 64 if (OrigVT == MVT::i1 || OrigVT == MVT::i8) in applyStackPassedSmallTypeDAGHack() 66 else if (OrigVT == MVT::i16) in applyStackPassedSmallTypeDAGHack() 85 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg() 89 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg() 90 return IncomingValueAssigner::assignArg(ValNo, OrigVT, ValVT, LocVT, in assignArg() 111 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg() 119 applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT); in assignArg()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 41 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg() 53 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg() 69 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg() 81 ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State); in assignArg()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CallLowering.h | 182 virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 674 const EVT OrigVT = EVT::getEVT(Args[i].Ty); in handleAssignments() local 707 bool BigEndianPartOrdering = TLI->hasBigEndianPartOrdering(OrigVT, DL); in handleAssignments() 793 if (Handler.isIncomingArgumentHandler() && OrigVT != LocVT) { in handleAssignments()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | 67 bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT, in assignArg()
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| H A D | X86ISelLowering.cpp | 32126 MVT OrigVT = VT; in LowerMGATHER() local 32153 SDValue Extract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OrigVT, in LowerMGATHER() 50748 EVT OrigVT = N->getValueType(0); in combineFneg() local 50770 return DAG.getBitcast(OrigVT, NewNode); in combineFneg() 50777 return DAG.getBitcast(OrigVT, NegArg); in combineFneg()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2428 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument 2429 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType() 2434 void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in setOperationPromotedToType() argument 2435 setOperationAction(Opc, OrigVT, Promote); in setOperationPromotedToType() 2436 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType()
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 4725 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local 4726 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable() 4731 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local 4732 if (OrigVT.getFixedSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 305 EVT OrigVT = VT; in ExpandConstantFP() local 316 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP() 317 TLI.ShouldShrinkFPConstant(OrigVT)) { in ExpandConstantFP() 331 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP() 337 OrigVT, dl, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
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| H A D | LegalizeVectorTypes.cpp | 6115 EVT OrigVT = N->getOperand(0).getValueType(); in WidenVecOp_VECREDUCE() local 6117 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE() 6126 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE() 6153 EVT OrigVT = VecOp.getValueType(); in WidenVecOp_VECREDUCE_SEQ() local 6155 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE_SEQ() 6163 unsigned OrigElts = OrigVT.getVectorMinNumElements(); in WidenVecOp_VECREDUCE_SEQ()
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| H A D | DAGCombiner.cpp | 11589 EVT OrigVT = N->getOperand(0).getValueType(); in CombineZExtLogicopShiftLoad() local 11590 if (TLI.isZExtFree(OrigVT, VT)) in CombineZExtLogicopShiftLoad()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3893 static Align CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument 3922 if (Flags.isSplit() && OrigVT != MVT::ppcf128) in CalculateStackSlotAlignment() 3923 Alignment = Align(OrigVT.getStoreSize()); in CalculateStackSlotAlignment() 3935 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotUsed() argument 3944 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed() 4338 EVT OrigVT = Ins[ArgNo].ArgVT; in LowerFormalArguments_64SVR4() local 4354 CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); in LowerFormalArguments_64SVR4() 6049 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local 6094 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in LowerCall_64SVR4() 6163 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4153 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument 4154 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits() 4155 return OrigVT; in getExtensionTo64Bits() 4157 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits() 4159 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9328 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument 9329 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits() 9330 return OrigVT; in getExtensionTo64Bits() 9332 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits() 9334 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
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