Searched refs:OperandIndex (Results 1 – 9 of 9) sorted by relevance
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 67 unsigned OperandIndex; member
70 unsigned OperandIndex, SUnit *SU) in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstCombineIntrinsic.cpp | 264 for (unsigned OperandIndex = ImageDimIntr->GradientStart; in simplifyAMDGCNImageIntrinsic() local
265 OperandIndex < ImageDimIntr->VAddrEnd; OperandIndex++) { in simplifyAMDGCNImageIntrinsic()
266 Value *Coord = II.getOperand(OperandIndex); in simplifyAMDGCNImageIntrinsic()
269 if (OperandIndex < ImageDimIntr->CoordStart || in simplifyAMDGCNImageIntrinsic()
278 assert(OperandIndex == ImageDimIntr->GradientStart || in simplifyAMDGCNImageIntrinsic()
315 for (unsigned OperandIndex = ImageDimIntr->GradientStart; in simplifyAMDGCNImageIntrinsic() local
316 OperandIndex < EndIndex; OperandIndex++) { in simplifyAMDGCNImageIntrinsic()
317 Args[OperandIndex] = in simplifyAMDGCNImageIntrinsic()
318 convertTo16Bit(*II.getOperand(OperandIndex), IC.Builder); in simplifyAMDGCNImageIntrinsic()
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| /llvm-project-15.0.7/llvm/include/llvm/MC/MCParser/ |
| H A D | MCTargetAsmParser.h | 226 unsigned OperandIndex) { in getMissedOperand() argument
232 Result.MissedOperand.Index = OperandIndex; in getMissedOperand()
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| /llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/ |
| H A D | MCInstrDescView.cpp | 285 for (auto OperandIndex : Var.TiedOperands) { in dump() local
288 Stream << "Op" << OperandIndex; in dump()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanSLP.cpp | 154 unsigned OperandIndex) { in getOperands() argument
159 Operands.push_back(U->getOperand(OperandIndex)); in getOperands()
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| H A D | SLPVectorizer.cpp | 11533 Optional<unsigned> OperandIndex = in findBuildAggregate_rec() local
11535 if (!OperandIndex) in findBuildAggregate_rec()
11540 BuildVectorOpds, InsertElts, *OperandIndex); in findBuildAggregate_rec()
11543 BuildVectorOpds[*OperandIndex] = InsertedOperand; in findBuildAggregate_rec()
11544 InsertElts[*OperandIndex] = LastInsertInst; in findBuildAggregate_rec()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | ScheduleDAGInstrs.cpp | 438 I->OperandIndex)); in addVRegDefDeps()
439 ST.adjustSchedDependency(SU, OperIdx, UseSU, I->OperandIndex, Dep); in addVRegDefDeps()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 250 unsigned OperandIndex) { in getRegOperandNumElts() argument
251 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); in getRegOperandNumElts()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 1326 unsigned OperandIndex; in rewriteInputConstraintReferences() local
1327 if (!OperandStr.getAsInteger(10, OperandIndex)) { in rewriteInputConstraintReferences()
1328 if (OperandIndex >= FirstIn) in rewriteInputConstraintReferences()
1329 OperandIndex += NumNewOuts; in rewriteInputConstraintReferences()
1330 OS << OperandIndex; in rewriteInputConstraintReferences()
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