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/llvm-project-15.0.7/llvm/test/ObjectYAML/MachO/
H A Dlazy_bind_opcode.yaml76 - Opcode: BIND_OPCODE_DONE
89 - Opcode: BIND_OPCODE_DONE
102 - Opcode: BIND_OPCODE_DONE
115 - Opcode: BIND_OPCODE_DONE
128 - Opcode: BIND_OPCODE_DONE
141 - Opcode: BIND_OPCODE_DONE
154 - Opcode: BIND_OPCODE_DONE
167 - Opcode: BIND_OPCODE_DONE
180 - Opcode: BIND_OPCODE_DONE
193 - Opcode: BIND_OPCODE_DONE
[all …]
H A Dbind_opcode.yaml70 - Opcode: BIND_OPCODE_SET_TYPE_IMM
76 - Opcode: BIND_OPCODE_DO_BIND
81 - Opcode: BIND_OPCODE_DO_BIND
86 - Opcode: BIND_OPCODE_DO_BIND
93 - Opcode: BIND_OPCODE_DO_BIND
95 - Opcode: BIND_OPCODE_DONE
111 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
116 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
121 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
128 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
[all …]
H A Dweak_bind_opcode.yaml70 - Opcode: BIND_OPCODE_SET_TYPE_IMM
76 - Opcode: BIND_OPCODE_DO_BIND
81 - Opcode: BIND_OPCODE_DO_BIND
86 - Opcode: BIND_OPCODE_DO_BIND
93 - Opcode: BIND_OPCODE_DO_BIND
95 - Opcode: BIND_OPCODE_DONE
111 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
116 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
121 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
128 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
[all …]
H A Dout_of_order_linkedit.yaml143 - Opcode: REBASE_OPCODE_SET_TYPE_IMM
153 - Opcode: REBASE_OPCODE_DONE
162 - Opcode: BIND_OPCODE_SET_TYPE_IMM
170 - Opcode: BIND_OPCODE_DO_BIND
176 - Opcode: BIND_OPCODE_DO_BIND
182 - Opcode: BIND_OPCODE_DO_BIND
191 - Opcode: BIND_OPCODE_DO_BIND
194 - Opcode: BIND_OPCODE_DONE
221 #CHECK: - Opcode: REBASE_OPCODE_DONE
237 #CHECK: - Opcode: BIND_OPCODE_DO_BIND
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/llvm-project-15.0.7/lldb/include/lldb/Core/
H A DOpcode.h29 class Opcode {
41 Opcode() = default;
79 case Opcode::eType8:
81 case Opcode::eType16:
85 case Opcode::eType32:
87 case Opcode::eType64:
99 case Opcode::eType8:
101 case Opcode::eType16:
105 case Opcode::eType32:
119 case Opcode::eType8:
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/llvm-project-15.0.7/llvm/test/tools/llvm-lipo/Inputs/
H A Darmv7-slice-big.yaml551 - Opcode: BIND_OPCODE_DONE
568 - Opcode: BIND_OPCODE_DONE
585 - Opcode: BIND_OPCODE_DONE
602 - Opcode: BIND_OPCODE_DONE
619 - Opcode: BIND_OPCODE_DONE
636 - Opcode: BIND_OPCODE_DONE
653 - Opcode: BIND_OPCODE_DONE
670 - Opcode: BIND_OPCODE_DONE
687 - Opcode: BIND_OPCODE_DONE
704 - Opcode: BIND_OPCODE_DONE
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/llvm-project-15.0.7/lldb/unittests/Symbol/Inputs/
H A Dinlined-functions.yaml724 - Opcode: 0x17
730 - Opcode: 0xC9
736 - Opcode: 0x3C
740 - Opcode: 0x3C
744 - Opcode: 0x3C
750 - Opcode: 0x3D
756 - Opcode: 0x3C
765 - Opcode: 0x4A
773 - Opcode: 0x59
788 - Opcode: 0x3C
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/llvm-project-15.0.7/lldb/source/Core/
H A DOpcode.cpp30 case Opcode::eType8: in Dump()
33 case Opcode::eType16: in Dump()
36 case Opcode::eType16_2: in Dump()
37 case Opcode::eType32: in Dump()
41 case Opcode::eType64: in Dump()
45 case Opcode::eTypeBytes: in Dump()
69 case Opcode::eType8: in GetDataByteOrder()
70 case Opcode::eType16: in GetDataByteOrder()
71 case Opcode::eType16_2: in GetDataByteOrder()
72 case Opcode::eType32: in GetDataByteOrder()
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h372 return isMUBUF(Opcode) || isMTBUF(Opcode) || isMIMG(Opcode); in isVMEM()
493 bool isDS(uint16_t Opcode) const { in isDS() argument
527 auto Flags = get(Opcode).TSFlags; in isSegmentSpecificFLAT()
564 bool isEXP(uint16_t Opcode) const { in isEXP() argument
598 bool isWQM(uint16_t Opcode) const { in isWQM() argument
1232 int getVOPe64(uint16_t Opcode);
1235 int getVOPe32(uint16_t Opcode);
1238 int getSDWAOp(uint16_t Opcode);
1241 int getDPPOp32(uint16_t Opcode);
1244 int getDPPOp64(uint16_t Opcode);
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/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp97 return Opcode == BPF::LDD || Opcode == BPF::LDW || Opcode == BPF::LDH || in isLoadInst()
98 Opcode == BPF::LDB || Opcode == BPF::LDW32 || Opcode == BPF::LDH32 || in isLoadInst()
120 if (Opcode == BPF::LDB || Opcode == BPF::LDH || Opcode == BPF::LDW || in checkADDrr()
121 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr()
122 Opcode == BPF::STW || Opcode == BPF::STD) in checkADDrr()
124 else if (Opcode == BPF::LDB32 || Opcode == BPF::LDH32 || in checkADDrr()
125 Opcode == BPF::LDW32 || Opcode == BPF::STB32 || in checkADDrr()
126 Opcode == BPF::STH32 || Opcode == BPF::STW32) in checkADDrr()
139 if (Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW || in checkADDrr()
140 Opcode == BPF::STD || Opcode == BPF::STB32 || Opcode == BPF::STH32 || in checkADDrr()
[all …]
/llvm-project-15.0.7/mlir/lib/Target/SPIRV/Deserialization/
H A DDeserializeOps.cpp117 case spirv::Opcode::OpExtInst: in processInstruction()
137 case spirv::Opcode::OpLine: in processInstruction()
139 case spirv::Opcode::OpNoLine: in processInstruction()
142 case spirv::Opcode::OpName: in processInstruction()
144 case spirv::Opcode::OpString: in processInstruction()
147 case spirv::Opcode::OpSource: in processInstruction()
155 case spirv::Opcode::OpTypeInt: in processInstruction()
196 case spirv::Opcode::OpLabel: in processInstruction()
198 case spirv::Opcode::OpBranch: in processInstruction()
206 case spirv::Opcode::OpPhi: in processInstruction()
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/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/
H A DSnippetGeneratorTest.cpp72 const unsigned Opcode = X86::ADC16i16; in TEST_F() local
83 EXPECT_THAT(IT.getOpcode(), Opcode); in TEST_F()
98 const unsigned Opcode = X86::ADD16ri; in TEST_F() local
106 EXPECT_THAT(IT.getOpcode(), Opcode); in TEST_F()
128 EXPECT_THAT(IT.getOpcode(), Opcode); in TEST_F()
164 const unsigned Opcode = X86::CMP64rr; in TEST_F() local
185 const unsigned Opcode = X86::LAHF; in TEST_F() local
223 const unsigned Opcode = X86::CDQ; in TEST_F() local
231 EXPECT_THAT(IT.getOpcode(), Opcode); in TEST_F()
378 return {&getInstr(Opcode)}; in getInstructionTemplate()
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/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVMakeCompressible.cpp100 static unsigned log2LdstWidth(unsigned Opcode) { in log2LdstWidth() argument
101 switch (Opcode) { in log2LdstWidth()
120 return 0x1f << log2LdstWidth(Opcode); in compressedLDSTOffsetMask()
148 const unsigned Opcode = MI.getOpcode(); in isCompressibleLoad() local
150 return Opcode == RISCV::LW || (!STI.is64Bit() && Opcode == RISCV::FLW) || in isCompressibleLoad()
151 Opcode == RISCV::LD || Opcode == RISCV::FLD; in isCompressibleLoad()
157 const unsigned Opcode = MI.getOpcode(); in isCompressibleStore() local
159 return Opcode == RISCV::SW || (!STI.is64Bit() && Opcode == RISCV::FSW) || in isCompressibleStore()
160 Opcode == RISCV::SD || Opcode == RISCV::FSD; in isCompressibleStore()
176 const unsigned Opcode = MI.getOpcode(); in getRegImmPairPreventingCompression() local
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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86AvoidStoreForwardingBlocks.cpp134 return Opcode == X86::MOVUPSrm || Opcode == X86::MOVAPSrm || in isXMMLoadOpcode()
135 Opcode == X86::VMOVUPSrm || Opcode == X86::VMOVAPSrm || in isXMMLoadOpcode()
136 Opcode == X86::VMOVUPDrm || Opcode == X86::VMOVAPDrm || in isXMMLoadOpcode()
137 Opcode == X86::VMOVDQUrm || Opcode == X86::VMOVDQArm || in isXMMLoadOpcode()
144 return Opcode == X86::VMOVUPSYrm || Opcode == X86::VMOVAPSYrm || in isYMMLoadOpcode()
145 Opcode == X86::VMOVUPDYrm || Opcode == X86::VMOVAPDYrm || in isYMMLoadOpcode()
146 Opcode == X86::VMOVDQUYrm || Opcode == X86::VMOVDQAYrm || in isYMMLoadOpcode()
154 return isXMMLoadOpcode(Opcode) || isYMMLoadOpcode(Opcode); in isPotentialBlockedMemCpyLd()
212 Opcode == X86::MOV32mr || Opcode == X86::MOV32mi || in isPotentialBlockingStoreInst()
213 Opcode == X86::MOV16mr || Opcode == X86::MOV16mi || in isPotentialBlockingStoreInst()
[all …]
/llvm-project-15.0.7/clang/lib/AST/Interp/
H A DOpcodes.td92 class Opcode {
130 def Ret : Opcode {
138 def RetVoid : Opcode {
144 def RetValue : Opcode {
150 def NoRet : Opcode {}
157 def Destroy : Opcode {
184 def Zero : Opcode {
189 def Null : Opcode {
254 def This : Opcode;
413 def Pop : Opcode {
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/llvm-project-15.0.7/lld/test/MachO/
H A Dbind-opcodes.s19 # CHECK-NEXT: Opcode: BIND_OPCODE_SET_TYPE_IMM
33 # CHECK-NEXT: Opcode: BIND_OPCODE_SET_ADDEND_SLEB
41 # CHECK-NEXT: Opcode: BIND_OPCODE_SET_ADDEND_SLEB
45 # CHECK-NEXT: Opcode: BIND_OPCODE_DO_BIND
51 # CHECK-NEXT: Opcode: BIND_OPCODE_SET_TYPE_IMM
54 # CHECK-NEXT: Opcode: BIND_OPCODE_ADD_ADDR_ULEB
65 # CHECK-NEXT: Opcode: BIND_OPCODE_DO_BIND
68 # CHECK-NEXT: Opcode: BIND_OPCODE_DONE
114 # CHECK32-NEXT: Opcode: BIND_OPCODE_DO_BIND
134 # CHECK32-NEXT: Opcode: BIND_OPCODE_DO_BIND
[all …]
H A Drebase-opcodes.s13 # CHECK-NEXT: Opcode: REBASE_OPCODE_SET_TYPE_IMM
15 # CHECK-NEXT: Opcode: REBASE_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB
22 # CHECK-NEXT: Opcode: REBASE_OPCODE_DO_REBASE_ADD_ADDR_ULEB
30 # CHECK-NEXT: Opcode: REBASE_OPCODE_DO_REBASE_IMM_TIMES
35 # CHECK-NEXT: Opcode: REBASE_OPCODE_ADD_ADDR_IMM_SCALED
50 # CHECK-NEXT: Opcode: REBASE_OPCODE_DO_REBASE_ADD_ADDR_ULEB
56 # CHECK-NEXT: Opcode: REBASE_OPCODE_DO_REBASE_IMM_TIMES
61 # CHECK-NEXT: Opcode: REBASE_OPCODE_ADD_ADDR_ULEB
78 # CHECK-NEXT: Opcode: REBASE_OPCODE_ADD_ADDR_IMM_SCALED
80 # CHECK-NEXT: Opcode: REBASE_OPCODE_DO_REBASE_IMM_TIMES
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp117 switch (Opcode) { in getIntImmCostInst()
450 Opcode == Instruction::SDiv || Opcode == Instruction::SRem; in getArithmeticInstrCost()
452 Opcode == Instruction::UDiv || Opcode == Instruction::URem; in getArithmeticInstrCost()
475 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub || in getArithmeticInstrCost()
476 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) in getArithmeticInstrCost()
528 if (Opcode == Instruction::Shl || Opcode == Instruction::LShr || in getArithmeticInstrCost()
550 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub || in getArithmeticInstrCost()
551 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) { in getArithmeticInstrCost()
752 if (Opcode == Instruction::ZExt || Opcode == Instruction::UIToFP) in getBoolVecToIntConversionCost()
819 if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt) { in getCastInstrCost()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp246 switch (Opcode) { in getIntImmCostInst()
427 unsigned Opcode = 0; in mightUseCTR() local
517 Opcode = ISD::STRICT_FMA; in mightUseCTR()
520 Opcode = ISD::STRICT_FSQRT; in mightUseCTR()
526 Opcode = ISD::STRICT_FCEIL; in mightUseCTR()
532 Opcode = ISD::STRICT_FRINT; in mightUseCTR()
535 Opcode = ISD::STRICT_LRINT; in mightUseCTR()
630 if (Opcode) { in mightUseCTR()
1159 assert((Opcode == Instruction::Load || Opcode == Instruction::Store) && in getMemoryOpCost()
1384 if (Opcode != Instruction::Load && Opcode != Instruction::Store) in hasActiveVectorLength()
[all …]
/llvm-project-15.0.7/lldb/test/API/functionalities/module_cache/debug_index/
H A Dexe.yaml735 - Opcode: 0x17
741 - Opcode: 0x83
750 - Opcode: 0x4A
754 - Opcode: 0x51
758 - Opcode: 0x4A
762 - Opcode: 0x4A
771 - Opcode: 0x82
777 - Opcode: 0xBA
781 - Opcode: 0x85
789 - Opcode: 0x13
[all …]
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DInstruction.h182 return Opcode >= UnaryOpsBegin && Opcode < UnaryOpsEnd;
185 return Opcode >= BinaryOpsBegin && Opcode < BinaryOpsEnd;
189 return Opcode == UDiv || Opcode == SDiv || Opcode == URem || Opcode == SRem;
194 return Opcode >= Shl && Opcode <= AShr;
209 return Opcode == And || Opcode == Or || Opcode == Xor;
529 return Opcode == And || Opcode == Or || Opcode == Xor ||
530 Opcode == Add || Opcode == Mul;
542 switch (Opcode) {
560 return Opcode == And || Opcode == Or;
573 static bool isNilpotent(unsigned Opcode) {
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/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerInfo.cpp80 OS << Opcode << ", Tys={"; in print()
86 OS << Opcode << ", MMOs={"; in print()
266 assert(Opcode >= FirstOp && Opcode <= LastOp && "Unsupported opcode"); in getOpcodeIdxForOpcode()
267 return Opcode - FirstOp; in getOpcodeIdxForOpcode()
379 for (unsigned Opcode = FirstOp; Opcode <= LastOp; ++Opcode) { in verify() local
380 const MCInstrDesc &MCID = MII.get(Opcode); in verify()
395 LLVM_DEBUG(dbgs() << MII.getName(Opcode) << " (opcode " << Opcode in verify()
402 FailedOpcodes.push_back(Opcode); in verify()
404 FailedOpcodes.push_back(Opcode); in verify()
408 for (unsigned Opcode : FailedOpcodes) in verify() local
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegacyLegalizerInfo.h84 unsigned Opcode; member
88 InstrAspect(unsigned Opcode, LLT Type) : Opcode(Opcode), Type(Type) {} in InstrAspect()
89 InstrAspect(unsigned Opcode, unsigned Idx, LLT Type) in InstrAspect()
90 : Opcode(Opcode), Idx(Idx), Type(Type) {} in InstrAspect()
93 return Opcode == RHS.Opcode && Idx == RHS.Idx && Type == RHS.Type;
182 const unsigned OpcodeIdx = Opcode - FirstOp; in setLegalizeScalarToDifferentSizeStrategy()
193 const unsigned OpcodeIdx = Opcode - FirstOp; in setLegalizeVectorElementToDifferentSizeStrategy()
322 const unsigned OpcodeIdx = Opcode - FirstOp; in setScalarAction()
329 const unsigned OpcodeIdx = Opcode - FirstOp; in setPointerAction()
345 unsigned OpcodeIdx = Opcode - FirstOp; in setScalarInVectorAction()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetOpcodes.h30 inline bool isPreISelGenericOpcode(unsigned Opcode) { in isPreISelGenericOpcode() argument
31 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START && in isPreISelGenericOpcode()
32 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isPreISelGenericOpcode()
36 inline bool isTargetSpecificOpcode(unsigned Opcode) { in isTargetSpecificOpcode() argument
37 return Opcode > TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isTargetSpecificOpcode()
42 inline bool isPreISelGenericOptimizationHint(unsigned Opcode) { in isPreISelGenericOptimizationHint() argument
43 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_START && in isPreISelGenericOptimizationHint()
44 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_END; in isPreISelGenericOptimizationHint()
/llvm-project-15.0.7/lldb/test/Shell/Commands/
H A Dcommand-image-lookup.yaml715 - Opcode: 0x13
721 - Opcode: 0x75
727 - Opcode: 0x3C
731 - Opcode: 0x4A
737 - Opcode: 0x31
743 - Opcode: 0x9F
747 - Opcode: 0x62
753 - Opcode: 0x3C
759 - Opcode: 0x4E
782 - Opcode: 0xFD
[all …]

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