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Searched refs:OpSize32 (Results 1 – 16 of 16) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrExtension.td19 "{cwtl|cwde}", []>, OpSize32, Sched<[WriteALU]>;
31 "{cltd|cdq}", []>, OpSize32, Sched<[WriteALU]>;
50 OpSize32, Sched<[WriteALU]>;
54 OpSize32, Sched<[WriteALULd]>;
58 OpSize32, Sched<[WriteALU]>;
62 OpSize32, TB, Sched<[WriteALULd]>;
76 OpSize32, Sched<[WriteALU]>;
80 OpSize32, Sched<[WriteALULd]>;
84 OpSize32, Sched<[WriteALU]>;
88 TB, OpSize32, Sched<[WriteALULd]>;
[all …]
H A DX86InstrControl.td36 "{l}ret{l|f}", []>, OpSize32;
42 "{l}ret{l|f}\t$amt", []>, OpSize32;
68 "jmp\t$dst", []>, OpSize32;
87 []>, TB, OpSize32;
136 OpSize32, Sched<[WriteJump]>;
139 OpSize32, Sched<[WriteJumpLd]>;
172 OpSize32, Sched<[WriteJump]>, NOTRACK;
194 OpSize32, Sched<[WriteJump]>;
226 "call{l}\t$dst", []>, OpSize32,
246 OpSize32,
[all …]
H A DX86InstrSystem.td89 OpSize32;
108 OpSize32;
227 OpSize32, NotMemoryFoldable;
230 OpSize32, NotMemoryFoldable;
247 OpSize32, NotMemoryFoldable;
250 OpSize32, NotMemoryFoldable;
262 "str{l}\t$dst", []>, TB, OpSize32;
305 OpSize32, Requires<[Not64BitMode]>;
310 OpSize32, Requires<[Not64BitMode]>;
315 OpSize32, Requires<[Not64BitMode]>;
[all …]
H A DX86InstrShiftRotate.td45 OpSize32;
79 OpSize32;
97 OpSize32;
114 OpSize32;
179 OpSize32;
197 OpSize32;
214 OpSize32;
233 OpSize32;
300 OpSize32;
317 OpSize32;
[all …]
H A DX86InstrInfo.td1690 OpSize32, AdSize32;
1706 AdSize16, OpSize32;
1922 OpSize32, TB;
1940 OpSize32, TB;
2022 OpSize32, TB;
2033 OpSize32, TB;
2112 OpSize32;
2185 OpSize32;
2382 OpSize32, T8PS;
2396 OpSize32, T8PS;
[all …]
H A DX86InstrArithmetic.td26 OpSize32, Requires<[Not64BitMode]>;
76 OpSize32, Sched<[WriteIMul32]>;
120 OpSize32, Sched<[WriteIMul32]>;
365 (implicit EFLAGS)]>, OpSize32;
384 (implicit EFLAGS)]>, OpSize32;
420 OpSize32;
452 OpSize32;
478 (implicit EFLAGS)]>, OpSize32;
499 OpSize32;
596 /// to Opsize16. i32 sets this to OpSize32.
[all …]
H A DX86InstrCMovSetCC.td30 TB, OpSize32;
49 timm:$cond, EFLAGS))]>, TB, OpSize32;
H A DX86InstrTSX.td31 "xbegin\t$dst", []>, OpSize32;
H A DX86InstrCompiler.td372 [(X86rep_movs i32)]>, REP, AdSize32, OpSize32,
391 [(X86rep_movs i32)]>, REP, AdSize64, OpSize32,
414 [(X86rep_stos i32)]>, REP, AdSize32, OpSize32,
672 Requires<[Not64BitMode]>, OpSize32, LOCK,
710 OpSize32, LOCK;
735 OpSize32, LOCK;
766 OpSize32, LOCK;
809 OpSize32, LOCK;
826 OpSize32, LOCK;
864 OpSize32, TB, LOCK;
[all …]
H A DX86InstrFormats.td181 def OpSize32 : OperandSize<2>; // Needs 0x66 prefix in 16-bit mode.
195 class OpSize32 { OperandSize OpSize = OpSize32; }
H A DX86InstrSSE.td5755 Sched<[WritePOPCNT]>, OpSize32, XS;
5761 Sched<[WritePOPCNT.Folded]>, OpSize32, XS;
6669 int_x86_sse42_crc32_32_32>, OpSize32;
6671 int_x86_sse42_crc32_32_32>, OpSize32;
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DX86RecognizableInstr.h149 OpSize16 = 1, OpSize32 = 2 enumerator
H A DX86RecognizableInstr.cpp895 } else if(OpSize == X86Local::OpSize32) { in typeFromString()
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h763 OpSize32 = 2 << OpSizeShift, enumerator
H A DX86MCCodeEmitter.cpp1255 (STI.hasFeature(X86::Is16Bit) ? X86II::OpSize32 : X86II::OpSize16)) in emitOpcodePrefix()
/llvm-project-15.0.7/llvm/docs/TableGen/
H A DProgRef.rst1961 OperandSize OpSize = OpSize32;