Lines Matching refs:OpSize32
26 OpSize32, Requires<[Not64BitMode]>;
32 OpSize32, Requires<[In64BitMode]>;
76 OpSize32, Sched<[WriteIMul32]>;
100 "mul{l}\t$src", []>, OpSize32, SchedLoadReg<WriteIMul32>;
120 OpSize32, Sched<[WriteIMul32]>;
138 "imul{l}\t$src", []>, OpSize32, SchedLoadReg<WriteIMul32>;
163 Sched<[WriteIMul32Reg]>, TB, OpSize32;
184 Sched<[WriteIMul32Reg.Folded, WriteIMul32Reg.ReadAfterFold]>, TB, OpSize32;
218 Sched<[WriteIMul32Imm]>, OpSize32;
224 Sched<[WriteIMul32Imm]>, OpSize32;
258 Sched<[WriteIMul32Imm.Folded]>, OpSize32;
264 Sched<[WriteIMul32Imm.Folded]>, OpSize32;
291 "div{l}\t$src", []>, Sched<[WriteDiv32]>, OpSize32;
306 "div{l}\t$src", []>, SchedLoadReg<WriteDiv32>, OpSize32;
323 "idiv{l}\t$src", []>, Sched<[WriteIDiv32]>, OpSize32;
338 "idiv{l}\t$src", []>, OpSize32, SchedLoadReg<WriteIDiv32>;
365 (implicit EFLAGS)]>, OpSize32;
384 (implicit EFLAGS)]>, OpSize32;
404 [(set GR32:$dst, (not GR32:$src1))]>, OpSize32;
420 OpSize32;
452 OpSize32;
464 OpSize32, Requires<[Not64BitMode]>;
478 (implicit EFLAGS)]>, OpSize32;
499 OpSize32;
511 OpSize32, Requires<[Not64BitMode]>;
526 (implicit EFLAGS)]>, OpSize32;
596 /// to Opsize16. i32 sets this to OpSize32.
615 1, OpSize32, 0>;