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Searched refs:OpSize16 (Results 1 – 15 of 15) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrControl.td28 "ret{w}", []>, OpSize16;
34 "ret{w}\t$amt", []>, OpSize16;
40 "{l}ret{w|f}", []>, OpSize16;
46 "{l}ret{w|f}\t$amt", []>, OpSize16;
52 OpSize16;
66 "jmp\t$dst", []>, OpSize16;
83 []>, OpSize16, TB;
129 OpSize16, Sched<[WriteJump]>;
132 OpSize16, Sched<[WriteJumpLd]>;
163 OpSize16, Sched<[WriteJump]>, NOTRACK;
[all …]
H A DX86InstrSystem.td86 OpSize16;
105 OpSize16;
219 OpSize16, NotMemoryFoldable;
222 OpSize16, NotMemoryFoldable;
240 OpSize16, NotMemoryFoldable;
243 OpSize16, NotMemoryFoldable;
260 "str{w}\t$dst", []>, TB, OpSize16;
289 OpSize16, TB;
293 OpSize16, TB;
318 OpSize16, TB;
[all …]
H A DX86InstrShiftRotate.td41 OpSize16;
75 OpSize16;
93 OpSize16;
110 OpSize16;
175 OpSize16;
193 OpSize16;
210 OpSize16;
229 OpSize16;
296 OpSize16;
313 OpSize16;
[all …]
H A DX86InstrExtension.td16 "{cbtw|cbw}", []>, OpSize16, Sched<[WriteALU]>;
28 "{cwtd|cwd}", []>, OpSize16, Sched<[WriteALU]>;
41 TB, OpSize16, Sched<[WriteALU]>;
45 TB, OpSize16, Sched<[WriteALULd]>;
67 TB, OpSize16, Sched<[WriteALU]>;
71 TB, OpSize16, Sched<[WriteALULd]>;
96 []>, TB, OpSize16, Sched<[WriteALU]>, NotMemoryFoldable;
99 []>, TB, OpSize16, Sched<[WriteALU]>, NotMemoryFoldable;
103 []>, OpSize16, TB, Sched<[WriteALULd]>, NotMemoryFoldable;
170 Sched<[WriteALU]>, OpSize16, Requires<[In64BitMode]>;
[all …]
H A DX86InstrInfo.td1319 OpSize16;
1332 OpSize16;
1339 OpSize16;
1365 OpSize16;
1918 OpSize16, TB;
1935 OpSize16, TB;
2019 OpSize16, TB;
2030 OpSize16, TB;
2105 OpSize16;
2181 OpSize16;
[all …]
H A DX86InstrArithmetic.td70 []>, OpSize16, Sched<[WriteIMul16]>;
116 OpSize16, Sched<[WriteIMul16]>;
361 (implicit EFLAGS)]>, OpSize16;
380 (implicit EFLAGS)]>, OpSize16;
416 OpSize16;
448 OpSize16;
461 OpSize16, Requires<[Not64BitMode]>;
475 (implicit EFLAGS)]>, OpSize16;
495 OpSize16;
523 (implicit EFLAGS)]>, OpSize16;
[all …]
H A DX86InstrCMovSetCC.td24 TB, OpSize16;
44 timm:$cond, EFLAGS))]>, TB, OpSize16;
H A DX86InstrTSX.td29 "xbegin\t$dst", []>, OpSize16;
H A DX86InstrCompiler.td368 [(X86rep_movs i16)]>, REP, AdSize32, OpSize16,
387 [(X86rep_movs i16)]>, REP, AdSize64, OpSize16,
409 [(X86rep_stos i16)]>, REP, AdSize32, OpSize16,
432 [(X86rep_stos i16)]>, REP, AdSize64, OpSize16,
702 OpSize16, LOCK;
727 OpSize16, LOCK;
758 OpSize16, LOCK;
805 OpSize16, LOCK;
822 OpSize16, LOCK;
860 OpSize16, TB, LOCK;
[all …]
H A DX86InstrFormats.td180 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32-bit mode.
194 class OpSize16 { OperandSize OpSize = OpSize16; }
H A DX86InstrSSE.td5745 Sched<[WritePOPCNT]>, OpSize16, XS;
5750 Sched<[WritePOPCNT.Folded]>, OpSize16, XS;
6665 int_x86_sse42_crc32_32_16>, OpSize16;
6667 int_x86_sse42_crc32_32_16>, OpSize16;
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DX86RecognizableInstr.cpp324 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
326 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
330 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext()
332 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
349 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
351 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
359 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext()
361 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
891 if(OpSize == X86Local::OpSize16) { in typeFromString()
1028 if(OpSize != X86Local::OpSize16) { in immediateEncodingFromString()
[all …]
H A DX86RecognizableInstr.h149 OpSize16 = 1, OpSize32 = 2 enumerator
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h762 OpSize16 = 1 << OpSizeShift, enumerator
H A DX86MCCodeEmitter.cpp1255 (STI.hasFeature(X86::Is16Bit) ? X86II::OpSize32 : X86II::OpSize16)) in emitOpcodePrefix()