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Searched refs:NumSubElts (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h123 int NumSubElts = SubVTy->getNumElements(); in getExtractSubvectorOverhead() local
125 (Index + NumSubElts) <= in getExtractSubvectorOverhead()
133 for (int i = 0; i != NumSubElts; ++i) { in getExtractSubvectorOverhead()
148 int NumSubElts = SubVTy->getNumElements(); in getInsertSubvectorOverhead() local
150 (Index + NumSubElts) <= in getInsertSubvectorOverhead()
158 for (int i = 0; i != NumSubElts; ++i) { in getInsertSubvectorOverhead()
1265 unsigned NumSubElts = NumElts / Factor; variable
1309 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1321 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1327 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
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/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h1153 int NumSubElts, SubIndex; in getUserCost() local
1165 if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex)) in getUserCost()
1169 FixedVectorType::get(VecTy->getScalarType(), NumSubElts), in getUserCost()
1216 if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex)) in getUserCost()
1219 FixedVectorType::get(VecTy->getScalarType(), NumSubElts), Operands); in getUserCost()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1275 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedBits() local
1278 DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedBits()
1385 unsigned NumSubElts = in SimplifyDemandedBits() local
3006 unsigned NumSubElts = SubVT.getVectorNumElements(); in SimplifyDemandedVectorElts() local
3009 APInt SubElts = DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedVectorElts()
3014 KnownUndef.insertBits(SubUndef, i * NumSubElts); in SimplifyDemandedVectorElts()
3015 KnownZero.insertBits(SubZero, i * NumSubElts); in SimplifyDemandedVectorElts()
3024 APInt SubElts = DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedVectorElts()
8688 unsigned NumSubElts = SubEC.getKnownMinValue(); in clampDynamicVectorIndex() local
8705 if (isPowerOf2_32(NElts) && NumSubElts == 1) { in clampDynamicVectorIndex()
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H A DSelectionDAG.cpp3039 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in computeKnownBits() local
3040 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in computeKnownBits()
3042 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in computeKnownBits()
4391 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); in ComputeNumSignBits() local
4392 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in ComputeNumSignBits()
4394 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in ComputeNumSignBits()
11009 auto PartialReduction = [&](SDValue Op, unsigned NumSubElts) { in matchBinOpReduction() argument
11014 EVT SubVT = EVT::getVectorVT(*getContext(), OpSVT, NumSubElts); in matchBinOpReduction()
H A DDAGCombiner.cpp22654 int NumSubElts = SubVT.getVectorNumElements(); in visitVECTOR_SHUFFLE() local
22655 assert((NumElts % NumSubElts) == 0 && "Subvector mismatch"); in visitVECTOR_SHUFFLE()
22667 for (int SubIdx = 0; SubIdx != (int)NumElts; SubIdx += NumSubElts) { in visitVECTOR_SHUFFLE()
22673 InsertionMask.begin() + SubIdx + NumSubElts, in visitVECTOR_SHUFFLE()
22674 NumElts + (SubVec * NumSubElts)); in visitVECTOR_SHUFFLE()
23427 int NumSubElts = NumElts * Split; in XformToShuffleWithZero() local
23431 for (int i = 0; i != NumSubElts; ++i) { in XformToShuffleWithZero()
23438 Indices.push_back(i + NumSubElts); in XformToShuffleWithZero()
23459 Indices.push_back(i + NumSubElts); in XformToShuffleWithZero()
23466 EVT ClearVT = EVT::getVectorVT(*DAG.getContext(), ClearSVT, NumSubElts); in XformToShuffleWithZero()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp264 for (unsigned i = 0, NumSubElts = 64 / BitWidth; i != NumSubElts; ++i) { in simplifyX86immShift() local
265 unsigned SubEltIdx = (NumSubElts - 1) - i; in simplifyX86immShift()
H A DX86TargetTransformInfo.cpp1114 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local
1115 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost()
1124 if (NumSubElts > OrigSubElts && (Index % OrigSubElts) == 0 && in getShuffleCost()
1125 (NumSubElts % OrigSubElts) == 0 && in getShuffleCost()
1130 assert(NumElts >= NumSubElts && NumElts > OrigSubElts && in getShuffleCost()
1136 int ExtractIndex = alignDown((Index % NumElts), NumSubElts); in getShuffleCost()
1161 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local
1162 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost()
H A DX86ISelLowering.cpp7369 APInt UndefSubElts(NumSubElts, 0); in getTargetConstantBitsFromNode()
7439 if ((BaseIdx + NumSubElts) != NumSrcElts) in getTargetConstantBitsFromNode()
8320 if (SubMask.size() != NumSubElts) { in getFauxShuffleMask()
8330 NumSubElts = SubMask.size(); in getFauxShuffleMask()
8345 int InputIdx = M / NumSubElts; in getFauxShuffleMask()
8772 uint64_t SubIdx = Index / NumSubElts; in getShuffleScalarElt()
8773 uint64_t SubElt = Index % NumSubElts; in getShuffleScalarElt()
13284 for (int j = 0; j != NumSubElts; ++j) { in matchShuffleAsBitRotate()
13288 if (!isInRange(M, i, i + NumSubElts)) in matchShuffleAsBitRotate()
13290 int Offset = (NumSubElts - (M - (i + j))) % NumSubElts; in matchShuffleAsBitRotate()
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/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DInstructions.h2330 int &NumSubElts, int &Index);
2332 int &NumSubElts, int &Index) {
2340 return isInsertSubvectorMask(MaskAsInts, NumSrcElts, NumSubElts, Index);
2344 bool isInsertSubvectorMask(int &NumSubElts, int &Index) const {
2352 return isInsertSubvectorMask(ShuffleMask, NumSrcElts, NumSubElts, Index);
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp3019 int NumSubElts = SubLT.second.getVectorNumElements(); in getShuffleCost() local
3020 if ((Index % NumSubElts) == 0 && (NumElts % NumSubElts) == 0) in getShuffleCost()
H A DAArch64ISelLowering.cpp15388 unsigned NumSubElts = SubVT.getVectorNumElements(); in performInsertSubvectorCombine() local
15390 (IdxVal != 0 && IdxVal != NumSubElts)) in performInsertSubvectorCombine()
15400 DAG.getVectorIdxConstant(NumSubElts, DL)); in performInsertSubvectorCombine()
/llvm-project-15.0.7/llvm/lib/IR/
H A DInstructions.cpp2326 int NumSrcElts, int &NumSubElts, in isInsertSubvectorMask() argument
2377 NumSubElts = NumSub1Elts; in isInsertSubvectorMask()
2389 NumSubElts = NumSub0Elts; in isInsertSubvectorMask()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp15458 unsigned NumSubElts = SubVT.getVectorNumElements(); in PerformInsertSubvectorCombine() local
15460 (IdxVal != 0 && IdxVal != NumSubElts)) in PerformInsertSubvectorCombine()
15471 DCI.DAG.getVectorIdxConstant(NumSubElts, DL)); in PerformInsertSubvectorCombine()