| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPrintfRuntimeBinding.cpp | 221 int NumElem = LLVMVecType ? LLVMVecType->getNumElements() : 1; in lowerPrintfForGpu() local
222 if (LLVMVecType && NumElem > 1) in lowerPrintfForGpu()
223 ResType = llvm::FixedVectorType::get(ResType, NumElem); in lowerPrintfForGpu()
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| H A D | AMDGPUISelLowering.h | 193 unsigned NumElem,
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| H A D | AMDGPURegisterBankInfo.cpp | 1939 unsigned NumElem = VecTy.getNumElements(); in foldExtractEltToCmpSelect() local
1941 if (!SITargetLowering::shouldExpandVectorDynExt(EltSize, NumElem, in foldExtractEltToCmpSelect()
1978 for (unsigned I = 1; I < NumElem; ++I) { in foldExtractEltToCmpSelect()
2037 unsigned NumElem = VecTy.getNumElements(); in foldInsertEltToCmpSelect() local
2039 if (!SITargetLowering::shouldExpandVectorDynExt(EltSize, NumElem, in foldInsertEltToCmpSelect()
2077 SmallVector<Register, 16> Ops(NumElem * NumLanes); in foldInsertEltToCmpSelect()
2079 for (unsigned I = 0; I < NumElem; ++I) { in foldInsertEltToCmpSelect()
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| H A D | SIISelLowering.h | 238 static bool shouldExpandVectorDynExt(unsigned EltSize, unsigned NumElem,
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| H A D | SIISelLowering.cpp | 10585 unsigned NumElem, in shouldExpandVectorDynExt() argument
10591 unsigned VecSize = EltSize * NumElem; in shouldExpandVectorDynExt()
10607 unsigned NumInsts = NumElem /* Number of compares */ + in shouldExpandVectorDynExt()
10608 ((EltSize + 31) / 32) * NumElem /* Number of cndmasks */; in shouldExpandVectorDynExt()
10629 unsigned NumElem = VecVT.getVectorNumElements(); in shouldExpandVectorDynExt() local
10632 EltSize, NumElem, Idx->isDivergent(), getSubtarget()); in shouldExpandVectorDynExt()
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| H A D | AMDGPUISelLowering.cpp | 769 unsigned NumElem, in storeOfVectorConstantIsCheap() argument
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| /llvm-project-15.0.7/llvm/tools/llvm-stress/ |
| H A D | llvm-stress.cpp | 632 unsigned NumElem = in Act() local
634 CondTy = FixedVectorType::get(CondTy, NumElem); in Act()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1383 bool storeOfVectorConstantIsCheap(EVT MemVT, unsigned NumElem, in storeOfVectorConstantIsCheap() argument
1387 return NumElem > 2; in storeOfVectorConstantIsCheap()
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| H A D | X86TargetTransformInfo.cpp | 4207 unsigned NumElem = SrcVTy->getNumElements(); in getMaskedMemoryOpCost() local
4209 FixedVectorType::get(Type::getInt8Ty(SrcVTy->getContext()), NumElem); in getMaskedMemoryOpCost()
4213 APInt DemandedElts = APInt::getAllOnes(NumElem); in getMaskedMemoryOpCost()
4220 InstructionCost MaskCmpCost = NumElem * (BranchCost + ScalarCompareCost); in getMaskedMemoryOpCost()
4224 NumElem * BaseT::getMemoryOpCost(Opcode, SrcVTy->getScalarType(), in getMaskedMemoryOpCost()
4234 LT.second.getVectorNumElements() == NumElem) in getMaskedMemoryOpCost()
4239 else if (LT.first * LT.second.getVectorNumElements() > NumElem) { in getMaskedMemoryOpCost()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1390 unsigned NumElem = WideInOp.getValueType().getVectorNumElements(); in PromoteIntRes_TRUNCATE() local
1392 N->getValueType(0).getScalarType(), NumElem); in PromoteIntRes_TRUNCATE()
1397 NumElem); in PromoteIntRes_TRUNCATE()
5409 unsigned NumElem = N->getOperand(0).getValueType().getVectorNumElements(); in PromoteIntRes_CONCAT_VECTORS() local
5410 assert(NumElem * NumOperands == NumOutElem && in PromoteIntRes_CONCAT_VECTORS()
5420 assert(NumElem == Op.getValueType().getVectorNumElements() && in PromoteIntRes_CONCAT_VECTORS()
5423 for (unsigned j = 0; j < NumElem; ++j) { in PromoteIntRes_CONCAT_VECTORS()
5426 Ops[i * NumElem + j] = DAG.getAnyExtOrTrunc(Ext, dl, OutElemTy); in PromoteIntRes_CONCAT_VECTORS()
5569 unsigned NumElem = Incoming->getValueType(0).getVectorNumElements(); in PromoteIntOp_CONCAT_VECTORS() local
5571 for (unsigned i=0; i<NumElem; ++i) { in PromoteIntOp_CONCAT_VECTORS()
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| H A D | DAGCombiner.cpp | 18414 if (NumElem < 2) { in tryStoreMergeOfConstants()
18437 NumConsecutiveStores -= NumElem; in tryStoreMergeOfConstants()
18447 NumConsecutiveStores -= NumElem; in tryStoreMergeOfConstants()
18687 NumElem = std::min(LastLegalType, NumElem); in tryStoreMergeOfLoads()
18690 if (NumElem < 2) { in tryStoreMergeOfLoads()
18714 NumConsecutiveStores -= NumElem; in tryStoreMergeOfLoads()
18723 unsigned Elts = NumElem * NumMemElts; in tryStoreMergeOfLoads()
18726 unsigned SizeInBits = NumElem * ElementSizeBytes * 8; in tryStoreMergeOfLoads()
18781 for (unsigned i = 0; i < NumElem; ++i) { in tryStoreMergeOfLoads()
18789 for (unsigned i = 0; i < NumElem; ++i) { in tryStoreMergeOfLoads()
[all …]
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| H A D | TargetLowering.cpp | 8210 unsigned NumElem = SrcVT.getVectorNumElements(); in scalarizeVectorLoad() local
8240 for (unsigned Idx = 0; Idx < NumElem; ++Idx) { in scalarizeVectorLoad()
8242 (DAG.getDataLayout().isBigEndian() ? (NumElem - 1) - Idx : Idx); in scalarizeVectorLoad()
8269 for (unsigned Idx = 0; Idx < NumElem; ++Idx) { in scalarizeVectorLoad()
8307 unsigned NumElem = StVT.getVectorNumElements(); in scalarizeVectorStore() local
8321 for (unsigned Idx = 0; Idx < NumElem; ++Idx) { in scalarizeVectorStore()
8327 (DAG.getDataLayout().isBigEndian() ? (NumElem - 1) - Idx : Idx); in scalarizeVectorStore()
8346 for (unsigned Idx = 0; Idx < NumElem; ++Idx) { in scalarizeVectorStore()
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| H A D | LegalizeDAG.cpp | 3807 unsigned NumElem = VT.getVectorNumElements(); in ExpandNode() local
3810 for (unsigned Idx = 0; Idx < NumElem; Idx++) { in ExpandNode()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 453 unsigned NumElem = VecTy.getVectorNumElements(); in typeSplit() local
454 assert((NumElem % 2) == 0 && "Expecting even-sized vector type"); in typeSplit()
455 MVT HalfTy = MVT::getVectorVT(VecTy.getVectorElementType(), NumElem/2); in typeSplit()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 606 unsigned NumElem, in storeOfVectorConstantIsCheap() argument
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