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Searched refs:NextReg (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp1763 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1774 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1777 NextReg += 4; in emitAlignedDPRCS2Spills()
1793 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1796 NextReg += 4; in emitAlignedDPRCS2Spills()
1810 NextReg += 2; in emitAlignedDPRCS2Spills()
1816 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1819 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1908 NextReg += 4; in emitAlignedDPRCS2Restores()
1925 NextReg += 4; in emitAlignedDPRCS2Restores()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp1183 unsigned NextReg = SrcReg; in getSrcVReg() local
1186 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
1191 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
1192 if (NextReg == SrcReg || !Register::isVirtualRegister(NextReg)) in getSrcVReg()
1194 SrcReg = NextReg; in getSrcVReg()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp2565 Register NextReg = CSI[i + RegInc].getReg(); in computeCalleeSaveRegisterPairs() local
2569 if (AArch64::GPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
2570 !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows, in computeCalleeSaveRegisterPairs()
2572 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
2575 if (AArch64::FPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
2576 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI, in computeCalleeSaveRegisterPairs()
2578 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
2581 if (AArch64::FPR128RegClass.contains(NextReg)) in computeCalleeSaveRegisterPairs()
2582 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1380 Register NextReg = MI->getOperand(1).getReg(); in getTestBitReg() local
1382 if (!NextReg.isValid() || !MRI.hasOneNonDBGUse(NextReg)) in getTestBitReg()
1386 Reg = NextReg; in getTestBitReg()
1434 Register NextReg; in getTestBitReg() local
1442 NextReg = TestReg; in getTestBitReg()
1448 NextReg = TestReg; in getTestBitReg()
1455 NextReg = TestReg; in getTestBitReg()
1463 NextReg = TestReg; in getTestBitReg()
1478 NextReg = TestReg; in getTestBitReg()
1483 if (!NextReg.isValid()) in getTestBitReg()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp2755 unsigned NextReg, NextRegNum, NextRegWidth; in ParseRegList() local
2758 if (!ParseAMDGPURegister(NextRegKind, NextReg, in ParseRegList()
2771 if (!AddNextRegisterToList(Reg, RegWidth, RegKind, NextReg, Loc)) in ParseRegList()
/llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp6141 int NextReg = nextReg(((MipsOperand &)*Operands[1]).getGPR32Reg()); in ConvertXWPOperands() local
6142 Inst.addOperand(MCOperand::createReg(NextReg)); in ConvertXWPOperands()