Lines Matching refs:NextReg
1763 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1768 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1774 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1777 NextReg += 4; in emitAlignedDPRCS2Spills()
1783 unsigned R4BaseReg = NextReg; in emitAlignedDPRCS2Spills()
1787 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1793 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1796 NextReg += 4; in emitAlignedDPRCS2Spills()
1802 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1810 NextReg += 2; in emitAlignedDPRCS2Spills()
1816 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills()
1819 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1821 .addImm((NextReg - R4BaseReg) * 2) in emitAlignedDPRCS2Spills()
1896 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Restores() local
1900 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1902 BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Qwb_fixed), NextReg) in emitAlignedDPRCS2Restores()
1908 NextReg += 4; in emitAlignedDPRCS2Restores()
1914 unsigned R4BaseReg = NextReg; in emitAlignedDPRCS2Restores()
1918 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1920 BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Q), NextReg) in emitAlignedDPRCS2Restores()
1925 NextReg += 4; in emitAlignedDPRCS2Restores()
1931 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1937 NextReg += 2; in emitAlignedDPRCS2Restores()
1943 BuildMI(MBB, MI, DL, TII.get(ARM::VLDRD), NextReg) in emitAlignedDPRCS2Restores()
1945 .addImm(2 * (NextReg - R4BaseReg)) in emitAlignedDPRCS2Restores()