Searched refs:NewConst (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TypePromotion.cpp | 486 Constant *NewConst = (SafeWrap.contains(I) && in PromoteTree() local
491 I->setOperand(i, NewConst); in PromoteTree()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1836 uint64_t NewConst = V.getConstantOperandVal(i) >> Amount; in willShiftRightEliminate() local
1837 return (NewConst == 1); in willShiftRightEliminate()
1852 uint64_t NewConst = V.getConstantOperandVal(i) >> Power; in factorOutPowerOf2() local
1853 if (NewConst == 1) in factorOutPowerOf2()
1855 Ops[i] = CurDAG->getConstant(NewConst, in factorOutPowerOf2()
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| H A D | HexagonISelLowering.cpp | 1120 SmallVector<Constant*, 128> NewConst; in LowerConstantPool() local
1125 NewConst.push_back(IRB.getInt8(CV->getOperand(i)->isZeroValue())); in LowerConstantPool()
1127 CVal = ConstantVector::get(NewConst); in LowerConstantPool()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3178 SDValue NewConst = DAG.getConstant(ShiftAmt - 32, SL, MVT::i32); in performSrlCombine() local
3179 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst); in performSrlCombine()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 4402 SDValue NewConst = DAG.getConstant(C1.trunc(InSize), dl, newVT); in SimplifySetCC() local
4405 NewConst, Cond); in SimplifySetCC()
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