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Searched refs:NegOp0 (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineNegator.cpp341 Value *NegOp0 = negate(I->getOperand(0), Depth + 1); in visitImpl() local
342 if (!NegOp0) // Early return. in visitImpl()
347 return Builder.CreateShuffleVector(NegOp0, NegOp1, Shuf->getShuffleMask(), in visitImpl()
381 if (Value *NegOp0 = negate(I->getOperand(0), Depth + 1)) in visitImpl() local
382 return Builder.CreateShl(NegOp0, I->getOperand(1), I->getName() + ".neg"); in visitImpl()
453 } else if (Value *NegOp0 = negate(Ops[0], Depth + 1)) { in visitImpl() local
454 NegatedOp = NegOp0; in visitImpl()
H A DInstCombineMulDivRem.cpp211 if (Value *NegOp0 = Negator::Negate(/*IsNegation*/ true, Op0, *this)) in visitMul() local
213 NegOp0, ConstantExpr::getNeg(cast<Constant>(Op1)), I.getName()); in visitMul()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp50629 if (SDValue NegOp0 = isFNEG(DAG, Op.getOperand(0).getNode(), Depth + 1)) in isFNEG() local
50630 if (NegOp0.getValueType() == VT) // FIXME: Can we do better? in isFNEG()
50631 return DAG.getVectorShuffle(VT, SDLoc(Op), NegOp0, DAG.getUNDEF(VT), in isFNEG()
50838 if (SDValue NegOp0 = in getNegatedExpression() local
50841 return DAG.getNode(Opc, SDLoc(Op), VT, NegOp0); in getNegatedExpression()