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Searched refs:ModelDef (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/utils/TableGen/
H A DCodeGenSchedule.h217 Record *ModelDef; member
254 Index(Idx), ModelName(std::move(Name)), ModelDef(MDef), ItinsDef(IDef), in CodeGenProcModel()
470 Record *ModelDef = ProcDef->getValueAsDef("SchedModel"); in getModelOrItinDef() local
473 assert(ModelDef->getValueAsBit("NoModel") in getModelOrItinDef()
477 return ModelDef; in getModelOrItinDef()
481 Record *ModelDef = getModelOrItinDef(ProcDef); in getModelForProc() local
482 ProcModelMapTy::const_iterator I = ProcModelMap.find(ModelDef); in getModelForProc()
487 CodeGenProcModel &getProcModel(Record *ModelDef) { in getProcModel() argument
488 ProcModelMapTy::const_iterator I = ProcModelMap.find(ModelDef); in getProcModel()
492 const CodeGenProcModel &getProcModel(Record *ModelDef) const { in getProcModel() argument
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H A DCodeGenSchedule.cpp809 Record *ModelDef = Rec->getValueAsDef("SchedModel"); in expandRWSeqForProc() local
810 if (&getProcModel(ModelDef) != &ProcModel) in expandRWSeqForProc()
1210 + ModelDef->getName()); in collectProcItinRW()
1910 Record *ModelDef = WR->getValueAsDef("SchedModel"); in collectProcResources() local
1911 addWriteRes(WR, getProcModel(ModelDef).Index); in collectProcResources()
1915 Record *ModelDef = SWR->getValueAsDef("SchedModel"); in collectProcResources() local
1916 addWriteRes(SWR, getProcModel(ModelDef).Index); in collectProcResources()
1920 Record *ModelDef = RA->getValueAsDef("SchedModel"); in collectProcResources() local
1921 addReadAdvance(RA, getProcModel(ModelDef).Index); in collectProcResources()
1927 addReadAdvance(SRA, getProcModel(ModelDef).Index); in collectProcResources()
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H A DSubtargetEmitter.cpp877 if (&SchedModels.getProcModel(ModelDef) != &ProcModel) in FindWriteResources()
907 PrintFatalError(ProcModel.ModelDef->getLoc(), in FindWriteResources()
929 if (&SchedModels.getProcModel(ModelDef) != &ProcModel) in FindReadAdvance()
959 PrintFatalError(ProcModel.ModelDef->getLoc(), in FindReadAdvance()
1385 EmitProcessorProp(OS, PM.ModelDef, "IssueWidth", ','); in EmitProcessorModels()
1386 EmitProcessorProp(OS, PM.ModelDef, "MicroOpBufferSize", ','); in EmitProcessorModels()
1388 EmitProcessorProp(OS, PM.ModelDef, "LoadLatency", ','); in EmitProcessorModels()
1389 EmitProcessorProp(OS, PM.ModelDef, "HighLatency", ','); in EmitProcessorModels()
1390 EmitProcessorProp(OS, PM.ModelDef, "MispredictPenalty", ','); in EmitProcessorModels()
1393 (PM.ModelDef ? PM.ModelDef->getValueAsBit("PostRAScheduler") : false); in EmitProcessorModels()
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