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Searched refs:MachineSchedRegistry (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h143 class MachineSchedRegistry
154 MachineSchedRegistry(const char *N, const char *D, ScheduleDAGCtor C) in MachineSchedRegistry() function
159 ~MachineSchedRegistry() { Registry.Remove(this); } in ~MachineSchedRegistry()
163 MachineSchedRegistry *getNext() const { in getNext()
164 return (MachineSchedRegistry *)MachinePassRegistryNode::getNext(); in getNext()
167 static MachineSchedRegistry *getList() { in getList()
168 return (MachineSchedRegistry *)Registry.getList(); in getList()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600TargetMachine.cpp42 static MachineSchedRegistry R600SchedRegistry("r600",
H A DAMDGPUTargetMachine.cpp457 static MachineSchedRegistry
461 static MachineSchedRegistry
466 static MachineSchedRegistry
471 static MachineSchedRegistry
476 static MachineSchedRegistry
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCTargetMachine.cpp590 static MachineSchedRegistry
595 static MachineSchedRegistry
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineScheduler.cpp266 MachinePassRegistry<MachineSchedRegistry::ScheduleDAGCtor>
267 MachineSchedRegistry::Registry;
276 static cl::opt<MachineSchedRegistry::ScheduleDAGCtor, false,
277 RegisterPassParser<MachineSchedRegistry>>
282 static MachineSchedRegistry
339 MachineSchedRegistry::ScheduleDAGCtor Ctor = MachineSchedOpt; in createMachineScheduler()
3504 static MachineSchedRegistry
3763 static MachineSchedRegistry ILPMaxRegistry(
3765 static MachineSchedRegistry ILPMinRegistry(
3857 static MachineSchedRegistry ShufflerRegistry(
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonTargetMachine.cpp138 static MachineSchedRegistry