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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrMMX.td19 // MMX Multiclasses
73 /// Unary MMX instructions requiring SSSE3.
87 /// Binary MMX instructions requiring SSSE3.
107 /// PALIGN MMX instructions (require SSSE3).
148 // MMX EMMS Instruction
157 // MMX Scalar Instructions
219 let SchedRW = [SchedWriteVecMoveLS.MMX.RM] in {
226 let SchedRW = [SchedWriteVecMoveLS.MMX.MR] in
300 SchedWriteVecALU.MMX>;
302 SchedWriteVecALU.MMX>;
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H A DX86Instr3DNow.td9 // This file describes the 3DNow! instruction set, which extends MMX to support
56 defm PAVGUSB : I3DNow_binop_rm_int<0xBF, "pavgusb", SchedWriteVecALU.MMX, 1>;
74 defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw", SchedWriteVecIMul.MMX, 1>;
112 defm PSWAPD : I3DNow_conv_rm_int<0xBB, "pswapd", SchedWriteShuffle.MMX, "a">;
H A DX86InstrFormats.td567 // MMXPI - SSE 1 & 2 packed instructions with MMX operands
635 // MMX operands.
637 // MMX operands.
713 // uses the MMX registers. The 64-bit versions are grouped with the MMX
992 // MMX Instruction templates
995 // MMXI - MMX instructions with TB prefix.
998 // MMX2I - MMX / SSE2 instructions with PD prefix.
999 // MMXIi8 - MMX instructions with ImmT == Imm8 and PS prefix.
1000 // MMXIi8 - MMX instructions with ImmT == Imm8 and PS prefix.
1001 // MMXID - MMX instructions with XD prefix.
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H A DX86Subtarget.h58 NoThreeDNow, MMX, ThreeDNow, ThreeDNowA enumerator
209 bool hasMMX() const { return X863DNowLevel >= MMX; } in hasMMX()
H A DX86CallingConv.td140 // MMX type gets 8 byte slot in stack , while alignment depends on target
258 // MMX vector types are always returned in MM0. If the target doesn't have
348 // MMX vector types are always returned in XMM0.
417 // MMX vector types are returned in XMM0, XMM1, XMM2 and XMM3.
550 // The first 8 MMX vector arguments are passed in XMM registers on Darwin.
661 // The first 4 MMX vector arguments are passed in GPRs.
H A DX86Schedule.td83 X86FoldableSchedWrite MMX = sScl; // MMX operations.
119 X86SchedWriteMoveLS MMX = sScl; // MMX operations.
H A DX86ScheduleBtVer2.td58 // The PRF in the floating point unit can eliminate a move from a MMX or SSE
977 // MMX Zero-idioms.
1020 // MMX
1041 // MMX variants.
H A DX86InstrFragmentsSIMD.td14 // MMX specific DAG Nodes.
17 // Low word of MMX to GPR.
20 // GPR to low word of MMX.
25 // MMX Pattern Fragments
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dmmx-build-vector.ll69 ; X86-MMX: # %bb.0:
75 ; X86-MMX-NEXT: retl
130 ; X86-MMX: # %bb.0:
136 ; X86-MMX-NEXT: retl
334 ; X86-MMX-NEXT: retl
601 ; X86-MMX-NEXT: retl
648 ; X86-MMX-NEXT: retl
687 ; X86-MMX-NEXT: retl
724 ; X86-MMX-NEXT: retl
760 ; X86-MMX-NEXT: retl
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H A D2008-09-05-sinttofp-2xi32.ll5 ; there are no MMX instructions here; we use XMM.
27 ; This is how to get MMX instructions.
H A Dmmx-copy-gprs.ll6 ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
H A Dvec_insert-7.ll5 ; MMX insertelement is not available; these are promoted to xmm.
H A Dfast-isel-bc.ll9 ; This isn't spectacular, but it's MMX code at -O0...
H A Dmmx-cvt.ll5 ; If we are transferring XMM conversion results to MMX registers we could use the MMX equivalents
257 ; FIXME: If we are transferring MMX registers to XMM for conversion we could use the MMX equivalents
H A Dvec_zero_cse.ll5 ; 64-bit stores here do not use MMX.
H A Dmxcsr-reg-usage.ll2 ; This test ensures that the MXCSR is implicitly used by MMX FP instructions.
H A Dvec_insert-mmx.ll5 ; This is not an MMX operation; promoted to xmm.
H A Dmmx-arith.ll5 ;; A basic functional check to make sure that MMX arithmetic actually compiles.
467 ; There are no MMX operations here, so we use XMM or i64.
560 ; MMX intrinsics calls get us MMX instructions.
H A Dvector-shuffle-mmx.ll5 ; If there is no explicit MMX type usage, always promote to XMM.
H A Dvec_insert-5.ll6 ; There are no MMX operations in @t1
H A Dx86-64-psub.ll4 ; MMX packed sub opcodes were wrongly marked as commutative.
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DIntrinsics.h119 MMX, enumerator
/llvm-project-15.0.7/clang/lib/Basic/Targets/
H A DX86.cpp366 .Case("+mmx", MMX) in handleTargetFeatures()
851 case MMX: in getTargetDefines()
1018 .Case("mmx", MMX3DNowLevel >= MMX) in hasFeature()
/llvm-project-15.0.7/llvm/test/MC/Disassembler/X86/
H A Dprefixes.txt100 # Test that MMX ignore REX.R and REX.B.
/llvm-project-15.0.7/llvm/lib/IR/
H A DFunction.cpp1013 OutputTable.push_back(IITDescriptor::get(IITDescriptor::MMX, 0)); in DecodeIITType()
1282 case IITDescriptor::MMX: return Type::getX86_MMXTy(Context); in DecodeFixedType()
1468 case IITDescriptor::MMX: return !Ty->isX86_MMXTy(); in matchIntrinsicType()

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