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Searched refs:MIB (Results 1 – 25 of 220) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DMVETailPredUtils.h111 MIB.addImm(0);
112 MIB.addImm(ARMCC::AL);
119 MIB.addImm(0);
120 MIB.addImm(ARMCC::AL);
130 MIB.addReg(ARM::CPSR);
154 MIB.addImm(ARMCC::AL);
155 MIB.addReg(0);
158 MIB.addReg(ARM::CPSR);
161 MIB.addReg(0);
176 MIB.addImm(0);
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H A DARMInstructionSelector.cpp484 : MBB(*MIB->getParent()), InsertBefore(std::next(MIB->getIterator())), in InsertInfo()
529 const InsertInfo I(MIB); in selectCmp()
569 MIB->eraseFromParent(); in selectCmp()
649 MIB.addImm(0); in selectGlobal()
722 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(), in selectGlobal()
727 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(), in selectGlobal()
736 MIB->removeOperand(1); in selectGlobal()
800 MIB->eraseFromParent(); in selectSelect()
808 MIB.addImm(ShiftOpc); in selectShift()
1000 MIB->removeOperand(1); in select()
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/llvm-project-15.0.7/bolt/lib/Passes/
H A DJTFootprintReduction.cpp64 BC.MIB->matchIndJmp(BC.MIB->matchAnyOperand(), in checkOpportunities()
65 BC.MIB->matchImm(Scale), BC.MIB->matchReg(), in checkOpportunities()
91 BC.MIB->matchIndJmp(BC.MIB->matchAdd( in checkOpportunities()
93 BC.MIB->matchLoad(BC.MIB->matchReg(BaseReg2), in checkOpportunities()
94 BC.MIB->matchImm(Scale), BC.MIB->matchReg(), in checkOpportunities()
98 BC.MIB->matchAdd(BC.MIB->matchLoadAddr(BC.MIB->matchSymbol()), in checkOpportunities()
141 BC.MIB->matchIndJmp(BC.MIB->matchAnyOperand(Base), in tryOptimizeNonPIC()
142 BC.MIB->matchImm(Scale), BC.MIB->matchReg(Index), in tryOptimizeNonPIC()
181 BC.MIB->matchIndJmp(BC.MIB->matchAdd( in tryOptimizePIC()
182 BC.MIB->matchLoadAddr(BC.MIB->matchAnyOperand(JumpTableRef)), in tryOptimizePIC()
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H A DRetpolineInsertion.cpp83 auto &MIB = *BC.MIB; in createNewRetpoline() local
112 MIB.createPause(Pause); in createNewRetpoline()
129 MIB.createSaveToStack(StoreToStack, MIB.getStackPointer(), 0, in createNewRetpoline()
134 MIB.createPushRegister(PushR11, MIB.getX86R11(), 8); in createNewRetpoline()
146 MIB.createSaveToStack(StoreToStack, MIB.getStackPointer(), 8, in createNewRetpoline()
151 MIB.createPopRegister(PopR11, MIB.getX86R11(), 8); in createNewRetpoline()
156 MIB.createSaveToStack(StoreToStack, MIB.getStackPointer(), 0, in createNewRetpoline()
165 MIB.createReturn(Return); in createNewRetpoline()
232 auto &MIB = *BC.MIB; in createBranchReplacement() local
279 auto &MIB = *BC.MIB; in runOnFunctions() local
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H A DThreeWayBranch.cpp24 if (BC.MIB->isPacked(Inst)) in shouldRunOnFunction()
80 unsigned FirstCC = BC.MIB->getCondCode(*FirstJump); in runOnFunction()
82 FirstCC = BC.MIB->getInvertedCondCode(FirstCC); in runOnFunction()
86 BC.MIB->getInvertedCondCode(BC.MIB->getCondCodesLogicalOr( in runOnFunction()
87 BC.MIB->getInvertedCondCode(BC.MIB->getCondCode(*SecondJump)), in runOnFunction()
92 BC.MIB->getInvertedCondCode(BC.MIB->getCondCodesLogicalOr( in runOnFunction()
93 BC.MIB->getCondCode(*SecondJump), FirstCC)); in runOnFunction()
95 if (!BC.MIB->isValidCondCode(FirstCC) || in runOnFunction()
96 !BC.MIB->isValidCondCode(ThirdCC) || !BC.MIB->isValidCondCode(SecondCC)) in runOnFunction()
137 BC.MIB->replaceBranchCondition( in runOnFunction()
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H A DStackAllocationAnalysis.cpp29 if (!BC.MIB->isPush(Inst) && in preflight()
30 (!BC.MIB->isRegToRegMove(Inst, From, To) || in preflight()
31 To != BC.MIB->getStackPointer() || in preflight()
32 From != BC.MIB->getFramePointer()) && in preflight()
97 const auto &MIB = BC.MIB; in computeNext() local
99 if (int Sz = MIB->getPopSize(Point)) { in computeNext()
103 if (MIB->isPush(Point)) { in computeNext()
111 if (MIB->isRegToRegMove(Point, From, To) && To == MIB->getStackPointer() && in computeNext()
112 From == MIB->getFramePointer()) { in computeNext()
113 if (MIB->isLeave(Point)) in computeNext()
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H A DInliner.cpp172 if (BC.MIB->isTailCall(Inst)) in getInliningInfo()
175 if (BC.MIB->isCFI(Inst)) { in getInliningInfo()
180 if (BC.MIB->isCall(Inst)) in getInliningInfo()
184 if (BC.MIB->isPush(Inst) || BC.MIB->isPop(Inst)) in getInliningInfo()
241 auto &MIB = *BC.MIB; in inlineCall() local
310 if (MIB.isPseudo(Inst)) in inlineCall()
319 if (MIB.isBranch(Inst)) { in inlineCall()
329 if (CSIsTailCall || (!MIB.isCall(Inst) && !MIB.isReturn(Inst))) { in inlineCall()
336 if (!MIB.isCall(Inst)) { in inlineCall()
341 MIB.convertTailCallToCall(Inst); in inlineCall()
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H A DFrameOptimizer.cpp67 MCPlusBuilder *MIB = BF.getBinaryContext().MIB.get(); in removeUnnecessaryLoads() local
108 if (MIB->isPop(Inst)) in removeUnnecessaryLoads()
126 MIB->removeAnnotation(Inst, "FrameAccessEntry"); in removeUnnecessaryLoads()
128 if (MIB->isRedundantMove(Inst)) { in removeUnnecessaryLoads()
201 if (BF.getBinaryContext().MIB->isPush(Inst)) in removeUnusedStores()
318 BC.MIB->getOrCreateAnnotationIndex( in performShrinkWrapping()
320 BC.MIB->getOrCreateAnnotationIndex("ReachingDefs"); in performShrinkWrapping()
321 BC.MIB->getOrCreateAnnotationIndex("ReachingUses"); in performShrinkWrapping()
330 BC.MIB->getOrCreateAnnotationIndex("ShrinkWrap-Todo"); in performShrinkWrapping()
333 BC.MIB->getOrCreateAnnotationIndex("ReachingInsns"); in performShrinkWrapping()
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H A DRegReAssign.cpp53 Operand.setReg(BC.MIB->getAliasSized(B, BC.MIB->getRegSize(Reg))); in swap()
60 Operand.setReg(BC.MIB->getAliasSized(A, BC.MIB->getRegSize(Reg))); in swap()
71 if (!BC.MIB->isCFI(Inst)) in swap()
87 BC.MIB->getAliasSized(B, BC.MIB->getRegSize(Reg2)), in swap()
94 BC.MIB->getAliasSized(A, BC.MIB->getRegSize(Reg2)), in swap()
123 BC.MIB->getAliasSized(B, BC.MIB->getRegSize(Reg)), false)); in swap()
128 BC.MIB->getAliasSized(A, BC.MIB->getRegSize(Reg)), false)); in swap()
260 AliveAtStart |= BC.MIB->getAliases(BC.MIB->getFramePointer(), false); in aggressivePassOverFunction()
362 BC.MIB->getGPRegs(GPRegs); in setupAggressivePass()
373 BC.MIB->getClassicGPRegs(ClassicRegs); in setupConservativePass()
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H A DAllocCombiner.cpp32 return BC.MIB->evaluateStackOffsetExpr( in getStackAdjustmentSize()
33 Inst, Adjustment, std::make_pair(BC.MIB->getStackPointer(), 0LL), in getStackAdjustmentSize()
38 if (BC.MIB->isCFI(Inst)) in isIndifferentToSP()
42 if (BC.MIB->isTerminator(Inst) || in isIndifferentToSP()
43 II.hasImplicitDefOfPhysReg(BC.MIB->getStackPointer(), BC.MRI.get()) || in isIndifferentToSP()
44 II.hasImplicitUseOfPhysReg(BC.MIB->getStackPointer())) in isIndifferentToSP()
48 if (Operand.isReg() && Operand.getReg() == BC.MIB->getStackPointer()) in isIndifferentToSP()
78 if (!Prev || !BC.MIB->isStackAdjustment(Inst) || in combineAdjustments()
79 !BC.MIB->isStackAdjustment(*Prev) || in combineAdjustments()
92 if (BC.MIB->isSUB(Inst)) in combineAdjustments()
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H A DShrinkWrapping.cpp373 if (Reg == BC.MIB->getStackPointer() || Reg == BC.MIB->getFramePointer()) { in classifyCFIs()
384 if (!BC.MIB->isCFI(Inst)) in classifyCFIs()
518 if (BC.MIB->isPush(Inst) || BC.MIB->isPop(Inst)) in collapseRegion()
616 if (BC.MIB->isPush(Inst) || BC.MIB->isPop(Inst)) in insertRegion()
633 assert(BC.MIB->isPop(Inst) || BC.MIB->isPush(Inst)); in performChanges()
730 const BitVector &FPAliases = BC.MIB->getAliases(BC.MIB->getFramePointer()); in classifyCSRUses()
733 if (BC.MIB->isCFI(Inst)) in classifyCSRUses()
1672 if (!BC.MIB->createRestoreFromStack(NewInst, BC.MIB->getStackPointer(), in createStackAccess()
1679 if (!BC.MIB->createSaveToStack(NewInst, BC.MIB->getStackPointer(), in createStackAccess()
1694 if (!BC.MIB->createRestoreFromStack(NewInst, BC.MIB->getFramePointer(), in createStackAccess()
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H A DStokeInfo.cpp47 MCPlusBuilder *MIB = BF.getBinaryContext().MIB.get(); in checkInstr() local
54 if (MIB->isPseudo(It)) in checkInstr()
57 if (MIB->isEHLabel(It) || MIB->isInvoke(It)) { in checkInstr()
62 if (MIB->isCall(It)) { in checkInstr()
64 const MCSymbol *TargetSymbol = MIB->getTargetSymbol(It); in checkInstr()
73 bool IsPush = MIB->isPush(It); in checkInstr()
74 bool IsRipAddr = MIB->hasPCRelOperand(It); in checkInstr()
78 if (MIB->isStore(It) && !IsPush && !IsRipAddr) in checkInstr()
166 BC.MIB->getDefaultDefIn(DefaultDefInMask); in runOnFunctions()
167 BC.MIB->getDefaultLiveOut(DefaultLiveOutMask); in runOnFunctions()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kExpandPseudo.cpp76 MachineInstrBuilder MIB(*MI.getParent()->getParent(), MI); in ExpandMI() local
85 return TII->ExpandMOVX_RR(MIB, MVT::i16, MVT::i8); in ExpandMI()
87 return TII->ExpandMOVX_RR(MIB, MVT::i32, MVT::i8); in ExpandMI()
89 return TII->ExpandMOVX_RR(MIB, MVT::i32, MVT::i16); in ExpandMI()
92 return TII->ExpandMOVSZX_RR(MIB, true, MVT::i16, MVT::i8); in ExpandMI()
166 return TII->ExpandCCR(MIB, /*IsToCCR=*/true); in ExpandMI()
168 return TII->ExpandCCR(MIB, /*IsToCCR=*/false); in ExpandMI()
222 MachineInstrBuilder MIB = in ExpandMI() local
229 MIB.addExternalSymbol(JumpTarget.getSymbolName(), in ExpandMI()
248 MachineInstrBuilder MIB; in ExpandMI() local
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H A DM68kInstrInfo.cpp375 MIB->eraseFromParent(); in ExpandMOVX_RR()
378 MIB->setDesc(get(Move)); in ExpandMOVX_RR()
431 MIB->eraseFromParent(); in ExpandMOVSZX_RR()
454 MIB->setDesc(Desc); in ExpandMOVSZX_RM()
485 MIB->eraseFromParent(); in ExpandPUSH_POP()
510 auto DL = MIB->getDebugLoc(); in ExpandMOVEM()
511 auto MI = MIB.getInstr(); in ExpandMOVEM()
538 .copyImplicitOps(*MIB); in ExpandMOVEM()
545 .copyImplicitOps(*MIB); in ExpandMOVEM()
548 MIB->eraseFromParent(); in ExpandMOVEM()
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H A DM68kInstrBuilder.h41 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset() argument
42 return MIB.addImm(Offset); in addOffset()
49 addRegIndirectWithDisp(const MachineInstrBuilder &MIB, Register Reg, in addRegIndirectWithDisp() argument
51 return MIB.addImm(Offset).addReg(Reg, getKillRegState(IsKill)); in addRegIndirectWithDisp()
59 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
60 MachineInstr *MI = MIB;
72 return MIB.addImm(Offset).addFrameIndex(FI).addMemOperand(MMO);
76 addMemOperand(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
77 MachineInstr *MI = MIB;
89 return MIB.addMemOperand(MMO);
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrBuilder.h143 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset() argument
157 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset() argument
172 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress() argument
177 MIB.addReg(AM.Base.Reg); in addFullAddress()
180 MIB.addFrameIndex(AM.Base.FrameIndex); in addFullAddress()
183 MIB.addImm(AM.Scale).addReg(AM.IndexReg); in addFullAddress()
187 MIB.addImm(AM.Disp); in addFullAddress()
189 return MIB.addReg(0); in addFullAddress()
199 MachineInstr *MI = MIB;
211 return addOffset(MIB.addFrameIndex(FI), Offset)
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/llvm-project-15.0.7/bolt/include/bolt/Passes/
H A DLivenessAnalysis.h57 BitVector FP = BC.MIB->getAliases(BC.MIB->getFramePointer()); in scavengeRegAfter()
78 BC.MIB->getDefaultLiveOut(State); in getStartingStateAtBB()
79 BC.MIB->getCalleeSavedRegs(State); in getStartingStateAtBB()
82 State.reset(BC.MIB->getFlagsReg()); in getStartingStateAtBB()
112 BC.MIB->getDefaultLiveOut(Written); in computeNext()
117 BC.MIB->getCalleeSavedRegs(CSR); in computeNext()
126 if (!this->BC.MIB->isCFI(Point)) { in computeNext()
127 if (BC.MIB->isCleanRegXOR(Point)) in computeNext()
135 BC.MIB->getDefaultLiveOut(Used); in computeNext()
150 (!BC.MIB->isTailCall(Point) || !BC.MIB->isConditionalBranch(Point))) { in computeNext()
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H A DStackPointerTracking.h78 const auto &MIB = this->BC.MIB; in computeNextSP() local
80 if (int Sz = MIB->getPushSize(Point)) { in computeNextSP()
87 if (int Sz = MIB->getPopSize(Point)) { in computeNextSP()
95 if (MIB->isRegToRegMove(Point, From, To) && To == MIB->getStackPointer() && in computeNextSP()
96 From == MIB->getFramePointer()) { in computeNextSP()
100 if (MIB->isLeave(Point)) in computeNextSP()
109 SP = std::make_pair(MIB->getStackPointer(), SPVal); in computeNextSP()
114 FP = std::make_pair(MIB->getFramePointer(), FPVal); in computeNextSP()
131 const auto &MIB = this->BC.MIB; in computeNextFP() local
134 if (MIB->isRegToRegMove(Point, From, To) && To == MIB->getFramePointer() && in computeNextFP()
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/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp704 return &*MIB; in EmitDbgValue()
799 MIB.addReg(VReg); in EmitDbgInstrRef()
800 MIB.addImm(0); in EmitDbgInstrRef()
803 return MIB; in EmitDbgInstrRef()
863 return &*MIB; in EmitDbgInstrRef()
874 MIB.addReg(0U); in EmitDbgNoLocation()
875 MIB.addReg(0U); in EmitDbgNoLocation()
878 return &*MIB; in EmitDbgNoLocation()
909 MIB.addImm(0U); in EmitDbgValueFromSingleOp()
911 MIB.addReg(0U); in EmitDbgValueFromSingleOp()
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp1797 MIB->tieOperands(0, MIB->getNumOperands() - 1); in selectImageIntrinsic()
3575 [=](MachineInstrBuilder &MIB) { MIB.add(Root); } in selectVCSRC()
3624 [=](MachineInstrBuilder &MIB) { MIB.add(Root); } in selectVSRC0()
3635 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3Mods0()
3649 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3BMods0()
3659 [=](MachineInstrBuilder &MIB) { MIB.add(Root); }, in selectVOP3OMods()
3672 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3Mods()
3684 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3BMods()
3697 [=](MachineInstrBuilder &MIB) { MIB.addReg(Reg); }, in selectVOP3NoMods()
3735 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3PMods()
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/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DCSEMIRBuilder.cpp127 MachineInstr *MIBInstr = MIB; in memoizeMI()
129 return MIB; in memoizeMI()
160 Observer->changingInstr(*MIB); in generateCopiesIfRequired()
161 MIB->setDebugLoc( in generateCopiesIfRequired()
164 Observer->changedInstr(*MIB); in generateCopiesIfRequired()
167 return MIB; in generateCopiesIfRequired()
285 getCSEInfo()->handleRemoveInst(&*MIB); in buildInstr()
286 return MIB; in buildInstr()
293 if (MIB) { in buildInstr()
321 if (MIB) { in buildConstant()
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/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp129 MIB.setInsertPt(*MI.getParent(), MI); in insertBitcasts()
157 MIB.setInsertPt(*MI->getParent(), MI); in propagateSPIRVType()
163 MIB.setInsertPt(*MI->getParent(), MI); in propagateSPIRVType()
200 MIB.setInsertPt(*Def->getParent(), in insertAssignInstr()
211 MIB.buildInstr(SPIRV::ASSIGN_TYPE) in insertAssignInstr()
334 MIB.setInsertPt(*MI.getParent(), in processInstr()
356 processInstr(MI, MIB, MRI, GR); in processInstrsWithTypeFolding()
487 MachineIRBuilder MIB(MF); in runOnMachineFunction() local
490 insertBitcasts(MF, GR, MIB); in runOnMachineFunction()
491 generateAssignInstrs(MF, GR, MIB); in runOnMachineFunction()
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H A DSPIRVUtils.cpp60 MIB.addImm(convertCharsToWord(Str, i)); in addStringImm()
77 void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB) { in addNumImm() argument
85 MIB.addImm(Imm.getZExtValue()); in addNumImm()
91 MIB.addImm(LowBits).addImm(HighBits); in addNumImm()
103 addStringImm(Name, MIB); in buildOpName()
107 static void finishBuildOpDecorate(MachineInstrBuilder &MIB, in finishBuildOpDecorate() argument
111 addStringImm(StrImm, MIB); in finishBuildOpDecorate()
113 MIB.addImm(DecArg); in finishBuildOpDecorate()
119 auto MIB = MIRBuilder.buildInstr(SPIRV::OpDecorate) in buildOpDecorate() local
122 finishBuildOpDecorate(MIB, DecArgs, StrImm); in buildOpDecorate()
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp82 MIB.setMF(MF); in setupMF()
1513 MIB); in emitTestBit()
1901 auto MIB = in selectVaStartDarwin() local
6398 [=](MachineInstrBuilder &MIB) { MIB.add(Base); }, in selectAddrModeUnscaled()
6455 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); }, in selectAddrModeIndexed()
6483 [=](MachineInstrBuilder &MIB) { MIB.add(LHS); }, in selectAddrModeIndexed()
6495 [=](MachineInstrBuilder &MIB) { MIB.add(Root); }, in selectAddrModeIndexed()
6496 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); }, in selectAddrModeIndexed()
6735 MIB.addImm( in renderFPImm16()
6744 MIB.addImm( in renderFPImm32()
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/llvm-project-15.0.7/bolt/lib/Core/
H A DBinaryFunction.cpp1019 auto &MIB = BC.MIB; in disassemble() local
1242 if (MIB->isBranch(Instruction) || MIB->isCall(Instruction)) { in disassemble()
1821 if (BC.MIB->isLeave(Instr) || BC.MIB->isPop(Instr)) { in postProcessIndirectBranches()
1899 auto &MIB = BC.MIB; in buildCFG() local
1953 if (!BC.MIB->isPseudo(*RII) && !BC.MIB->isNoop(*RII)) { in buildCFG()
3216 auto &MIB = BC.MIB; in fixBranches() local
3537 if (BC.MIB->getCanonicalBranchCondCode(BC.MIB->getCondCode( in dfs()
3744 BC.MIB->matchIndJmp(BC.MIB->matchReg(BaseReg1), in disambiguateJumpTables()
3757 BC.MIB->matchLoad(BC.MIB->matchReg(BaseReg1), in disambiguateJumpTables()
3776 BC.MIB->matchIndJmp(BC.MIB->matchAdd( in disambiguateJumpTables()
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