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Searched refs:MCRegAliasIterator (Results 1 – 25 of 48) sorted by relevance

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/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DRegisterAliasing.cpp18 using RegAliasItr = MCRegAliasIterator; in getAliasedBits()
50 using RegAliasItr = MCRegAliasIterator; in FillOriginAndAliasedBits()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DRegUsageInfoCollector.cpp148 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
161 for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
H A DAggressiveAntiDepBreaker.cpp157 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) { in StartBlock()
175 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in StartBlock()
305 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HandleLastUse()
387 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction()
417 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in PrescanInstruction()
673 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) { in FindSuitableFreeRegisters()
906 for (MCRegAliasIterator AI(AntiDepReg, TRI, true); AI.isValid(); ++AI) in BreakAntiDependencies()
H A DRegisterClassInfo.cpp65 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
76 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
H A DCriticalAntiDepBreaker.cpp69 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) { in StartBlock()
87 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { in StartBlock()
199 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction()
336 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in ScanInstruction()
H A DMachineRegisterInfo.cpp518 for (MCRegAliasIterator AI(PhysReg, TRI, true); in isConstantPhysReg()
571 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { in isPhysRegModified()
586 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); in isPhysRegUsed()
613 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in disableCalleeSavedRegister()
H A DCallingConvLower.cpp60 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in MarkAllocated()
65 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in MarkUnallocated()
H A DDeadMachineInstructionElim.cpp175 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in eliminateDeadMI()
H A DMachineLICM.cpp467 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in ProcessMI()
487 for (MCRegAliasIterator AS(Reg, TRI, true); AS.isValid(); ++AS) { in ProcessMI()
493 for (MCRegAliasIterator AS(Reg, TRI, true); AS.isValid(); ++AS) in ProcessMI()
538 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) in HoistRegionPostRA()
557 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HoistRegionPostRA()
H A DRegisterScavenging.cpp318 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI) in findSurvivorReg()
530 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI) in scavengeRegister()
544 for (MCRegAliasIterator AI(SI.Reg, TRI, true); AI.isValid(); ++AI) in scavengeRegister()
H A DMachineCSE.cpp297 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in hasLivePhysRegDefUses()
326 for (MCRegAliasIterator AI(PhysDefs[i].second, TRI, true); AI.isValid(); in hasLivePhysRegDefUses()
H A DLivePhysRegs.cpp147 for (MCRegAliasIterator R(Reg, TRI, false); R.isValid(); ++R) { in available()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp82 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in initReg()
151 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in init()
575 for (auto K = MCRegAliasIterator(I.getOperand(J).getReg(), &RI, true); in registerProducer()
601 for (MCRegAliasIterator Alias(RegDef, &RI, true); Alias.isValid(); in checkRegisterCurDefs()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DLivePhysRegs.h94 for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R) in removeReg()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.cpp114 MCRegAliasIterator R(Reg, this, true); in reserveRegisterTuples()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp602 for (MCRegAliasIterator AI(X86::R8 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
606 for (MCRegAliasIterator AI(X86::XMM8 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
612 for (MCRegAliasIterator AI(X86::XMM0 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
901 for (MCRegAliasIterator AI(Reg, this, true); AI.isValid(); ++AI) in findDeadCallerSavedReg()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp382 for (MCRegAliasIterator AI(*R, &TRI, true); AI.isValid(); ++AI) in setCallerSaved()
392 for (MCRegAliasIterator AI(R, &TRI, false); AI.isValid(); ++AI) in setUnallocatableRegs()
447 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in isRegInSet()
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCRegisterInfo.h788 class MCRegAliasIterator {
799 MCRegAliasIterator(MCRegister Reg, const MCRegisterInfo *MCRI, in MCRegAliasIterator() function
/llvm-project-15.0.7/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp276 for (MCRegAliasIterator RAI(Reg, &TRI, true); RAI.isValid(); ++RAI) in loadInlocs()
706 for (MCRegAliasIterator RAI(SP, &TRI, true); RAI.isValid(); ++RAI) in MLocTracker()
977 for (MCRegAliasIterator RAI(Reg, TRI, true); RAI.isValid(); ++RAI) in isCalleeSaved()
1352 for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI) in transferDebugPHI()
1444 for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI) in transferRegisterDef()
1516 for (MCRegAliasIterator RAI(DstRegNum, TRI, true); RAI.isValid(); ++RAI) in performCopy()
1681 for (MCRegAliasIterator RAI(Reg, TRI, true); RAI.isValid(); ++RAI) in transferSpillOrRestoreInst()
1715 for (MCRegAliasIterator RAI(Reg, TRI, true); RAI.isValid(); ++RAI) in transferRegisterCopy()
1749 for (MCRegAliasIterator RAI(DestReg, TRI, true); RAI.isValid(); ++RAI) { in transferRegisterCopy()
2203 for (MCRegAliasIterator RAI(R, TRI, true); RAI.isValid(); ++RAI) { in placeMLocPHIs()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp266 for (MCRegAliasIterator AI(Regs->getFramePointerRegister(), this, true); in getReservedRegs()
271 for (MCRegAliasIterator AI(Regs->getStackPointerRegister(), this, true); in getReservedRegs()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp499 for (MCRegAliasIterator AI(Op.getReg(), TRI, true); AI.isValid(); ++AI) in slhLoads()
571 for (MCRegAliasIterator AI(Op.getReg(), TRI, true); AI.isValid(); ++AI) in expandSpeculationSafeValue()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp129 for (MCRegAliasIterator I(Reg, this, /* self */ true); I.isValid(); ++I) { in getReservedRegs()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiDelaySlotFiller.cpp255 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in isRegInSet()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.cpp92 for (MCRegAliasIterator AI(SP::D16 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
H A DDelaySlotFiller.cpp347 for (MCRegAliasIterator AI(Reg, Subtarget->getRegisterInfo(), true); in IsRegInSet()

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