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Searched refs:LowerVECTOR_SHUFFLE (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h135 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
H A DWebAssemblyISelLowering.cpp1424 return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
2298 WebAssemblyTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, in LowerVECTOR_SHUFFLE() function in WebAssemblyTargetLowering
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h169 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
H A DHexagonISelLowering.cpp2188 HexagonTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) in LowerVECTOR_SHUFFLE() function in HexagonTargetLowering
3205 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h1283 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
H A DPPCISelLowering.cpp9860 SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, in LowerVECTOR_SHUFFLE() function in PPCTargetLowering
11194 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h991 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
H A DAArch64ISelLowering.cpp5461 return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
10450 SDValue AArch64TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, in LowerVECTOR_SHUFFLE() function in AArch64TargetLowering
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-neon-2velem.ll1964 ; TODO: The pattern in LowerVECTOR_SHUFFLE does not match what we are looking for.
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8681 static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG, in LowerVECTOR_SHUFFLE() function
10387 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG, Subtarget); in LowerOperation()