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Searched refs:Lo0 (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp843 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local
866 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) }; in SelectADD_SUB_I64()
869 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0), N->getOperand(2) }; in SelectADD_SUB_I64()
H A DSIISelLowering.cpp4599 SDValue Lo0, Hi0; in splitBinaryVectorOp() local
4600 std::tie(Lo0, Hi0) = DAG.SplitVectorOperand(Op.getNode(), 0); in splitBinaryVectorOp()
4606 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, in splitBinaryVectorOp()
4623 SDValue Lo0, Hi0; in splitTernaryVectorOp() local
4625 std::tie(Lo0, Hi0) = Op0.getValueType().isVector() in splitTernaryVectorOp()
4636 SDValue OpLo = DAG.getNode(Opc, SL, ResVT.first, Lo0, Lo1, Lo2, in splitTernaryVectorOp()
8783 SDValue Lo0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, LHS, Zero); in LowerSELECT() local
8786 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); in LowerSELECT()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp3524 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
3526 GetSplitVector(N->getOperand(0), Lo0, Hi0); in SplitVecOp_VSETCC()
3528 auto PartEltCnt = Lo0.getValueType().getVectorElementCount(); in SplitVecOp_VSETCC()
3535 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2)); in SplitVecOp_VSETCC()
3543 LoRes = DAG.getNode(ISD::VP_SETCC, DL, PartResVT, Lo0, Lo1, in SplitVecOp_VSETCC()
H A DTargetLowering.cpp4706 SDValue Lo0, Lo1, Hi0, Hi1; in SimplifySetCC() local
4707 if (IsConcat(N0.getOperand(0), Lo0, Hi0) && in SimplifySetCC()
4709 return MergeConcat(DAG.getNode(N0.getOpcode(), dl, OpVT, Lo0, Lo1), in SimplifySetCC()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9267 ConstantSDNode *Lo0 = dyn_cast<ConstantSDNode>(BVN->getOperand(LoElt)); in isExtendedBUILD_VECTOR() local
9271 if (!Lo0 || !Hi0 || !Lo1 || !Hi1) in isExtendedBUILD_VECTOR()
9274 if (Hi0->getSExtValue() == Lo0->getSExtValue() >> 32 && in isExtendedBUILD_VECTOR()