| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | LaneBitmask.h | 40 struct LaneBitmask { struct 46 constexpr LaneBitmask() = default; argument 57 return LaneBitmask(~Mask); 59 constexpr LaneBitmask operator|(LaneBitmask M) const { 60 return LaneBitmask(Mask | M.Mask); 62 constexpr LaneBitmask operator&(LaneBitmask M) const { 63 return LaneBitmask(Mask & M.Mask); 65 LaneBitmask &operator|=(LaneBitmask M) { 69 LaneBitmask &operator&=(LaneBitmask M) { 83 static constexpr LaneBitmask getNone() { return LaneBitmask(0); } in getNone() argument [all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 47 LaneBitmask UsedLanes; 48 LaneBitmask DefinedLanes; 90 LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes, 241 LaneBitmask MO2UsedLanes = in transferUsedLanes() 249 LaneBitmask MO1UsedLanes; in transferUsedLanes() 350 return LaneBitmask::getAll(); in determineInitialDefinedLanes() 362 return LaneBitmask::getNone(); in determineInitialDefinedLanes() 370 LaneBitmask DefinedLanes; in determineInitialDefinedLanes() 378 LaneBitmask MODefinedLanes; in determineInitialDefinedLanes() 404 return LaneBitmask::getNone(); in determineInitialDefinedLanes() [all …]
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| H A D | RegisterPressure.cpp | 52 LaneBitmask PrevMask, LaneBitmask NewMask) { in increaseSetPressure() 66 LaneBitmask PrevMask, LaneBitmask NewMask) { in decreaseSetPressure() 377 return LaneBitmask::getNone(); in getRegLanes() 421 static LaneBitmask 428 LaneBitmask Result; in getLanesWithProperty() 446 return Property(*LR, Pos) ? LaneBitmask::getAll() : LaneBitmask::getNone(); in getLanesWithProperty() 723 LaneBitmask PrevMask; in discoverLiveInOrOut() 724 LaneBitmask NewMask; in discoverLiveInOrOut() 726 PrevMask = LaneBitmask::getNone(); in discoverLiveInOrOut() 1068 LaneBitmask DefLanes = P.LaneMask; in bumpUpwardPressure() [all …]
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| H A D | RDFRegisters.cpp | 56 UnitInfos[U].Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo() 60 std::pair<uint32_t,LaneBitmask> P = *I; in PhysicalRegisterInfo() 69 UI.Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo() 145 std::pair<RegisterId,LaneBitmask> PA = *UMA; in aliasRR() 174 if (RR.Mask == LaneBitmask::getAll()) in aliasRM() 185 LaneBitmask M = RR.Mask; in aliasRM() 250 std::pair<uint32_t,LaneBitmask> P = *U; in hasAliasOf() 265 std::pair<uint32_t,LaneBitmask> P = *U; in hasCoverOf() 280 std::pair<uint32_t,LaneBitmask> P = *U; in insert() 351 LaneBitmask M; in makeRegRef() [all …]
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| H A D | LiveIntervalCalc.cpp | 61 LaneBitmask SubMask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) in calculate() 66 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg); in calculate() 103 extendToUses(LI, Reg, LaneBitmask::getAll()); in calculate() 121 extendToUses(MainRange, LI.reg(), LaneBitmask::getAll(), &LI); in constructMainRangeFromSubranges() 137 LaneBitmask Mask, LiveInterval *LI) { in extendToUses() 161 LaneBitmask SLM = TRI.getSubRegIndexLaneMask(SubReg); in extendToUses()
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| H A D | RegisterCoalescer.cpp | 164 LaneBitmask ShrinkMask; 999 LaneBitmask MaskA; in removeCopyByCommutingDef() 1958 LaneBitmask PrunedLanes; in joinCopy() 2026 ShrinkMask = LaneBitmask::getNone(); in joinCopy() 2342 const LaneBitmask LaneMask; 2400 LaneBitmask WriteLanes; 2404 LaneBitmask ValidLanes; 2565 LaneBitmask L; in computeWriteLanes() 2660 V.WriteLanes = LaneBitmask::getAll(); in analyzeValue() 2668 LaneBitmask Lanes = SubRangeJoin ? LaneBitmask::getLane(0) in analyzeValue() [all …]
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| H A D | ScheduleDAGInstrs.cpp | 365 return LaneBitmask::getAll(); in getLaneMaskForMO() 391 LaneBitmask DefLaneMask; in addVRegDefDeps() 392 LaneBitmask KillLaneMask; in addVRegDefDeps() 415 DefLaneMask = LaneBitmask::getAll(); in addVRegDefDeps() 416 KillLaneMask = LaneBitmask::getAll(); in addVRegDefDeps() 426 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() 464 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() 487 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps() 488 LaneBitmask NonOverlapMask = V2SU.LaneMask & ~LaneMask; in addVRegDefDeps() 513 LaneBitmask LaneMask = TrackLaneMasks ? getLaneMaskForMO(MO) in addVRegUseDeps() [all …]
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| H A D | LiveInterval.cpp | 870 LaneBitmask LaneMask, in stripValuesNotDefiningMask() 896 LaneBitmask ExpectedDefMask = in stripValuesNotDefiningMask() 917 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges() 921 LaneBitmask ToApply = LaneMask; in refineSubRanges() 923 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges() 924 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges() 963 LaneBitmask LaneMask, in computeSubRangeUndefs() 967 LaneBitmask VRegMask = MRI.getMaxLaneMaskForVReg(reg()); in computeSubRangeUndefs() 975 LaneBitmask DefMask = TRI.getSubRegIndexLaneMask(SubReg); in computeSubRangeUndefs() 976 LaneBitmask UndefMask = VRegMask & ~DefMask; in computeSubRangeUndefs() [all …]
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| H A D | LiveIntervals.cpp | 376 auto getSubRange = [](const LiveInterval &I, LaneBitmask M) in extendSegmentsToUses() 497 extendSegmentsToUses(NewLR, WorkList, Reg, LaneBitmask::getNone()); in shrinkToUses() 572 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() 767 LaneBitmask DefinedLanesMask; in addKillFlags() 770 DefinedLanesMask = LaneBitmask::getNone(); in addKillFlags() 781 DefinedLanesMask = LaneBitmask::getAll(); in addKillFlags() 1040 updateRange(LI, Reg, LaneBitmask::getNone()); in updateAllRanges() 1068 updateRange(*LR, *Units, LaneBitmask::getNone()); in updateAllRanges() 1457 LaneBitmask LaneMask) { in findLastUseBefore() 1571 LaneBitmask LaneMask) { in repairOldRegInRange() [all …]
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| H A D | TargetRegisterInfo.cpp | 56 const LaneBitmask *SRILaneMasks, in TargetRegisterInfo() 57 LaneBitmask SRICoveringLanes, in TargetRegisterInfo() 526 LaneBitmask LaneMask, SmallVectorImpl<unsigned> &NeededIndexes) const { in getCoveringSubRegIndexes() 535 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes() 562 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes() 567 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes()
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| H A D | MachineVerifier.cpp | 241 LaneBitmask LaneMask) const; 257 LaneBitmask LaneMask = LaneBitmask::getNone()); 261 LaneBitmask LaneMask = LaneBitmask::getNone()); 272 LaneBitmask); 275 LaneBitmask); 277 LaneBitmask LaneMask = LaneBitmask::getNone()); 2349 LaneBitmask MOMask = SubRegIdx != 0 in checkLiveness() 2352 LaneBitmask LiveInMask; in checkLiveness() 2441 LaneBitmask MOMask = SubRegIdx != 0 in checkLiveness() 3202 LaneBitmask Mask; in verifyLiveInterval() [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 40 LaneBitmask LaneMask; 263 LaneBitmask LaneMask; 294 LaneBitmask contains(Register Reg) const { in contains() 298 return LaneBitmask::getNone(); in contains() 304 LaneBitmask insert(RegisterMaskPair Pair) { in insert() 312 return LaneBitmask::getNone(); in insert() 317 LaneBitmask erase(RegisterMaskPair Pair) { in erase() 321 return LaneBitmask::getNone(); in erase() 322 LaneBitmask PrevMask = I->LaneMask; in erase() 551 LaneBitmask NewMask); [all …]
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| H A D | RDFRegisters.h | 73 LaneBitmask Mask = LaneBitmask::getNone(); 76 explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll()) 77 : Reg(R), Mask(R != 0 ? M : LaneBitmask::getNone()) {} in Reg() 97 std::hash<LaneBitmask::Type>{}(Mask.getAsInteger()); in hash() 147 LaneBitmask Mask; 205 using MapType = std::map<RegisterId, LaneBitmask>; 251 PrintLaneMaskOpt(LaneBitmask M) : Mask(M) {} in PrintLaneMaskOpt() 252 LaneBitmask Mask;
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| H A D | TargetRegisterInfo.h | 55 const LaneBitmask LaneMask; 207 LaneBitmask getLaneMask() const { in getLaneMask() 246 const LaneBitmask *SubRegIndexLaneMasks; 249 LaneBitmask CoveringLanes; 258 const LaneBitmask *SRILaneMasks, 259 LaneBitmask CoveringLanes, 378 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask() 389 LaneBitmask LaneMask, 651 LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA, in composeSubRegIndexLaneMask() 665 LaneBitmask reverseComposeSubRegIndexLaneMask(unsigned IdxA, in reverseComposeSubRegIndexLaneMask() [all …]
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| H A D | LiveIntervalCalc.h | 39 void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask, 55 extendToUses(LR, PhysReg, LaneBitmask::getAll()); in extendToUses()
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| H A D | ScheduleDAGInstrs.h | 54 LaneBitmask LaneMask; 57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit() 69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx() 372 LaneBitmask getLaneMaskForMO(const MachineOperand &MO) const;
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| H A D | LiveRegUnits.h | 93 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { in addRegMasked() 95 LaneBitmask UnitMask = (*Unit).second; in addRegMasked()
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| H A D | LiveInterval.h | 696 LaneBitmask LaneMask; 699 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() 702 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() 786 LaneBitmask LaneMask) { in createSubRange() 795 LaneBitmask LaneMask, in createSubRangeFrom() 827 LaneBitmask LaneMask, 870 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
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| H A D | MachineBasicBlock.h | 103 LaneBitmask LaneMask; 105 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask) 378 LaneBitmask LaneMask = LaneBitmask::getAll()) { 400 LaneBitmask LaneMask = LaneBitmask::getAll()); 404 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
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| H A D | RegisterScavenging.h | 195 void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.h | 69 LaneBitmask PrevMask, 70 LaneBitmask NewMask, 109 using LiveRegSet = DenseMap<unsigned, LaneBitmask>; 196 LaneBitmask getLiveLaneMask(unsigned Reg, 266 Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI); in getRegPressure()
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| H A D | GCNRegPressure.cpp | 85 LaneBitmask PrevMask, in inc() 86 LaneBitmask NewMask, in inc() 187 static LaneBitmask getDefRegMask(const MachineOperand &MO, in getDefRegMask() 199 static LaneBitmask getUsedRegMask(const MachineOperand &MO, in getUsedRegMask() 244 LaneBitmask llvm::getLiveLaneMask(unsigned Reg, in getLiveLaneMask() 248 LaneBitmask LiveMask; in getLiveLaneMask() 378 It.second = LaneBitmask::getNone(); in advanceBeforeNext()
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| H A D | SIFormMemoryClauses.cpp | 35 typedef DenseMap<unsigned, std::pair<unsigned, LaneBitmask>> RegUse; 178 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in canBundle() 227 LaneBitmask Mask = Reg.isVirtual() in collectRegUses() 229 : LaneBitmask::getAll(); in collectRegUses() 362 LaneBitmask KilledMask; in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.h | 50 LaneBitmask Mask; 71 mutable LaneBitmask LaneMask; 133 LaneBitmask computeLaneMask() const; 226 typedef SmallVector<LaneBitmask, 16> RegUnitLaneMaskList; 235 ArrayRef<LaneBitmask> getRegUnitLaneMasks() const { in getRegUnitLaneMasks() 336 LaneBitmask LaneMask; 829 LaneBitmask CoveringLanes;
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| H A D | CodeGenRegisters.cpp | 108 LaneMask = LaneBitmask::getAll(); in computeLaneMask() 111 LaneBitmask M; in computeLaneMask() 1489 CoveringLanes = LaneBitmask::getAll(); in computeSubRegLaneMasks() 1492 if (Bit > LaneBitmask::BitWidth) { in computeSubRegLaneMasks() 1500 Idx.LaneMask = LaneBitmask::getNone(); in computeSubRegLaneMasks() 1536 LaneBitmask SrcMask = LaneBitmask::getLane(SrcBit); in computeSubRegLaneMasks() 1537 if (NextBit < LaneBitmask::BitWidth-1) in computeSubRegLaneMasks() 1557 SrcMask = LaneBitmask::getNone(); in computeSubRegLaneMasks() 1587 LaneBitmask Mask = Idx.computeLaneMask(); in computeSubRegLaneMasks() 1596 LaneBitmask LaneMask; in computeSubRegLaneMasks() [all …]
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