Searched refs:LRINT (Results 1 – 13 of 13) sorted by relevance
| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 81 DAG_FUNCTION(lrint, 1, 1, experimental_constrained_lrint, LRINT)
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 933 LRINT, enumerator
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 374 case ISD::LRINT: return "lrint"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 852 case ISD::LRINT: Res = SoftenFloatOp_LRINT(N); break; in SoftenFloatOperand()
1803 case ISD::LRINT: Res = ExpandFloatOp_LRINT(N); break; in ExpandFloatOperand()
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| H A D | LegalizeDAG.cpp | 1007 case ISD::LRINT: in LegalizeOp()
4169 case ISD::LRINT: in ConvertNodeToLibcall()
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| H A D | SelectionDAGBuilder.cpp | 6297 case Intrinsic::lrint: Opcode = ISD::LRINT; break; in visitIntrinsicCall()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 502 case Intrinsic::lrint: Opcode = ISD::LRINT; break; in mightUseCTR()
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| H A D | PPCISelLowering.cpp | 544 setOperationAction(ISD::LRINT, MVT::f64, Legal); in PPCTargetLowering()
545 setOperationAction(ISD::LRINT, MVT::f32, Legal); in PPCTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 890 ISD::LRINT, ISD::LLRINT}, in initActions()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 505 def lrint : SDNode<"ISD::LRINT" , SDTFPToIntOp>;
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 285 setOperationAction(ISD::LRINT, MVT::f32, Custom); in X86TargetLowering()
286 setOperationAction(ISD::LRINT, MVT::f64, Custom); in X86TargetLowering()
291 setOperationAction(ISD::LRINT, MVT::i64, Custom); in X86TargetLowering()
798 setOperationAction(ISD::LRINT, MVT::f80, Custom); in X86TargetLowering()
32282 case ISD::LRINT: in LowerOperation()
32942 case ISD::LRINT: in ReplaceNodeResults()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 303 ISD::FMINNUM, ISD::FMAXNUM, ISD::LRINT, in RISCVTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 682 ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering()
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