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Searched refs:LLROUND (Results 1 – 15 of 15) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DConstrainedOps.def84 DAG_FUNCTION(llround, 1, 0, experimental_constrained_llround, LLROUND)
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h932 LLROUND, enumerator
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp372 case ISD::LLROUND: return "llround"; in getOperationName()
H A DLegalizeFloatTypes.cpp850 case ISD::LLROUND: Res = SoftenFloatOp_LLROUND(N); break; in SoftenFloatOperand()
1802 case ISD::LLROUND: Res = ExpandFloatOp_LLROUND(N); break; in ExpandFloatOperand()
H A DLegalizeDAG.cpp1006 case ISD::LLROUND: in LegalizeOp()
4162 case ISD::LLROUND: in ConvertNodeToLibcall()
H A DLegalizeIntegerTypes.cpp2432 case ISD::LLROUND: in ExpandIntegerResult()
3463 if (N->getOpcode() == ISD::LLROUND || in ExpandIntRes_LLROUND_LLRINT()
H A DSelectionDAGBuilder.cpp6296 case Intrinsic::llround: Opcode = ISD::LLROUND; break; in visitIntrinsicCall()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp507 case Intrinsic::llround: Opcode = ISD::LLROUND; break; in mightUseCTR()
H A DPPCISelLowering.cpp550 setOperationAction(ISD::LLROUND, MVT::f64, Legal); in PPCTargetLowering()
551 setOperationAction(ISD::LLROUND, MVT::f32, Legal); in PPCTargetLowering()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp889 ISD::FRINT, ISD::FTRUNC, ISD::LROUND, ISD::LLROUND, in initActions()
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Darm64-irtranslator.ll2492 ; CHECK: [[LLROUND:%[0-9]+]]:_(s64) = G_LLROUND [[COPY]](s32)
2493 ; CHECK: $x0 = COPY [[LLROUND]](s64)
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td504 def llround : SDNode<"ISD::LLROUND" , SDTFPToIntOp>;
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp304 ISD::LLRINT, ISD::LROUND, ISD::LLROUND, in RISCVTargetLowering()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp682 ISD::LLROUND, ISD::LRINT, ISD::LLRINT, in AArch64TargetLowering()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp797 setOperationAction(ISD::LLROUND, MVT::f80, Expand); in X86TargetLowering()